diff options
| author | jiawei <jiawei@iscas.ac.cn> | 2022-05-30 10:35:02 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson.chu@sifive.com> | 2022-05-30 11:42:08 +0800 |
| commit | 292c7bf86de50ad643b929a7ac5769505d54e45f (patch) | |
| tree | 63e803693ef4b60ba49739c59baede22892bd9e0 /bfd/elfxx-riscv.c | |
| parent | 9606310bbbf8a2d529b5c2aa71cac48a46f65869 (diff) | |
RISC-V: Add zhinx extension supports.
The zhinx extension is a sub-extension in zfinx, corresponding to
zfh extension but use GPRs instead of FPRs.
This patch expanded the zfh insn class define, since zfh and zhinx
use the same opcodes, thanks for Nelson's works.
changelog in V2: Add missing classes of 'zfh' and 'zhinx' in
"riscv_multi_subset_supports_ext".
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): New extensions.
(riscv_multi_subset_supports_ext): New extensions.
gas/ChangeLog:
* testsuite/gas/riscv/fp-zhinx-insns.d: New test.
* testsuite/gas/riscv/fp-zhinx-insns.s: New test.
include/ChangeLog:
* opcode/riscv.h (enum riscv_insn_class): New INSN classes.
opcodes/ChangeLog:
* riscv-opc.c: Modify INSN_CLASS.
Diffstat (limited to 'bfd/elfxx-riscv.c')
| -rw-r--r-- | bfd/elfxx-riscv.c | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 2953dc34b2..92ad03feea 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1105,6 +1105,8 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] = {"zqinx", "zdinx", check_implicit_always}, {"zdinx", "zfinx", check_implicit_always}, {"zfinx", "zicsr", check_implicit_always}, + {"zhinx", "zfinx", check_implicit_always}, + {"zhinx", "zicsr", check_implicit_always}, {"zk", "zkn", check_implicit_always}, {"zk", "zkr", check_implicit_always}, {"zk", "zkt", check_implicit_always}, @@ -1187,6 +1189,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] = {"zfinx", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zdinx", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zqinx", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, + {"zhinx", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zbb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zba", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, {"zbc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 }, @@ -2365,12 +2368,17 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps, || riscv_subset_supports (rps, "zqinx")); case INSN_CLASS_ZFH: return riscv_subset_supports (rps, "zfh"); - case INSN_CLASS_D_AND_ZFH: + case INSN_CLASS_ZFH_OR_ZHINX: + return riscv_subset_supports (rps, "zfh") + || riscv_subset_supports (rps, "zhinx"); + case INSN_CLASS_D_AND_ZFH_INX: return (riscv_subset_supports (rps, "d") - && riscv_subset_supports (rps, "zfh") ); - case INSN_CLASS_Q_AND_ZFH: + && riscv_subset_supports (rps, "zfh")) + || riscv_subset_supports (rps, "zhinx"); + case INSN_CLASS_Q_AND_ZFH_INX: return (riscv_subset_supports (rps, "q") - && riscv_subset_supports (rps, "zfh")); + && riscv_subset_supports (rps, "zfh")) + || riscv_subset_supports (rps, "zhinx"); case INSN_CLASS_ZBA: return riscv_subset_supports (rps, "zba"); case INSN_CLASS_ZBB: @@ -2509,6 +2517,14 @@ riscv_multi_subset_supports_ext (riscv_parse_subset_t *rps, return "v' or `zve64d' or `zve64f' or `zve32f"; case INSN_CLASS_SVINVAL: return "svinval"; + case INSN_CLASS_ZFH: + return "zfh"; + case INSN_CLASS_ZFH_OR_ZHINX: + return "zfh' or 'zhinx"; + case INSN_CLASS_D_AND_ZFH_INX: + return "('d' and 'zfh') or 'zhinx"; + case INSN_CLASS_Q_AND_ZFH_INX: + return "('q' and 'zfh') or 'zhinx"; default: rps->error_handler (_("internal: unreachable INSN_CLASS_*")); |