diff options
| author | TCWG BuildSlave <tcwg-buildslave@linaro.org> | 2023-08-04 20:59:13 +0000 |
|---|---|---|
| committer | TCWG BuildSlave <tcwg-buildslave@linaro.org> | 2023-08-04 20:59:13 +0000 |
| commit | 1fc3624ac8a8667c10f35470e1c3f51b6183c8cf (patch) | |
| tree | e6a1ee0fdda6823b31f06a88297f67deeddb8e15 /notify/mail-body.txt | |
| parent | 566662377ca969b8087793382188c78be03de22f (diff) | |
force: #67: all: [TCWG CI] https://ci.linaro.org/job/tcwg_kernel--llvm-master-aarch64-mainline-allyesconfig-build/67/
Results :
| # reset_artifacts:
| -10
| # build_abe binutils:
| -9
| # build_kernel_llvm:
| -5
| # build_abe qemu:
| -2
| # linux_n_obj:
| 22083
| # linux build successful:
| all
check_regression status : 0
Diffstat (limited to 'notify/mail-body.txt')
| -rw-r--r-- | notify/mail-body.txt | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/notify/mail-body.txt b/notify/mail-body.txt index 4c69abc..ba41e7f 100644 --- a/notify/mail-body.txt +++ b/notify/mail-body.txt @@ -1,13 +1,13 @@ -[TCWG-CI] Success after qemu commit: 149 commits in qemu +[TCWG-CI] Success after llvm commit: 1279 commits in llvm In CI config tcwg_kernel/llvm-master-aarch64-mainline-allyesconfig after: - | qemu commits: - | 9ba37026fcf6b7f3f096c0cca3e1e7307802486b Update version for v8.1.0-rc2 release - | fb695ae3fdfe34ce7bf2eaa4595d48ca809c8841 Merge tag 'pull-qapi-2023-08-02' of https://repo.or.cz/qemu/armbru into staging - | 081619e677f148ad91897a37f94894959729bbd4 Merge tag 'misc-fixes-20230801' of https://github.com/philmd/qemu into staging - | 2b3edd95186dc505f21d823119cdd0dfb23b3ee0 MAINTAINERS: Add section "Migration dirty limit and dirty page rate" - | ef965377325e186ce1f73e5f40d07d77e2cc9410 qapi: Craft the dirty-limit capability comment - | ... and 144 more + | llvm commits: + | ab202aa7004a451ee9f496505256cfcb94d71747 [Clang] Increase default architecture from sm_35 to sm_52 + | 54bda79335ba65b0ab739a97e24030fcd95165b7 AMDGPU: Simplify and improve sincos matching + | 660b740e4b3c4b23dfba36940ae0fe2ad41bfedf [DAG] Support store merging of vector constant stores + | 2ad297db2c0ea168822b4958dbe3f3c1d3198d79 [mlir][spirv] Handle zero-element tensors in spirv type conversion + | 7ef1718c4d4ecd99f3ba48236f7fd4fd9ffb540c [Driver] Don't try to spell check unsupported options + | ... and 1274 more Results changed to # reset_artifacts: @@ -42,6 +42,6 @@ all -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: -Current build : https://ci.linaro.org/job/tcwg_kernel--llvm-master-aarch64-mainline-allyesconfig-build/66/artifact/artifacts -Reference build : https://ci.linaro.org/job/tcwg_kernel--llvm-master-aarch64-mainline-allyesconfig-build/64/artifact/artifacts +Current build : https://ci.linaro.org/job/tcwg_kernel--llvm-master-aarch64-mainline-allyesconfig-build/67/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_kernel--llvm-master-aarch64-mainline-allyesconfig-build/66/artifact/artifacts |