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Diffstat (limited to 'notify/mail-body.txt')
| -rw-r--r-- | notify/mail-body.txt | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/notify/mail-body.txt b/notify/mail-body.txt new file mode 100644 index 0000000..1501798 --- /dev/null +++ b/notify/mail-body.txt @@ -0,0 +1,72 @@ +[TCWG-CI] Success after commit: 226 commits in binutils,gcc,linux,qemu + +In CI config tcwg_kernel/gnu-master-arm-lts-defconfig after: + | binutils commits: + | 13f5f57e0d2fb3e06e15c57d67a40499a5910ba6 gdb: check max-value-size when reading strings for printf + | 7d8708653dc05075b926a61303abd96c3f746e25 gdb: remove last alloca call from printcmd.c + | 1a36815e2f1ad39acf894660759cf1a0bef39fcc gdb: remove two uses of alloca from printcmd.c + | bde240e7f83f208568254574082df12c871dcbc8 gdb: fix printf of wchar_t early in a gdb session + | eae2847fbff56657a5d14909b574ab8ea718ee08 ld: fix build with old glibc / gcc + | ... and 35 more + | gcc commits: + | 6f428f1a88557f8b5df653ece92ac3e7b5baf6c6 IBM Z: Fix vec_init default expander + | 1f7e5a7b91862b999aab88ee0319052aaf00f0f1 LRA: Refine reload pseudo class + | c496d15954cdeab7f9039328f94a6f62cf893d5f A singleton irange has all known bits. + | bf3469b6474f6cff168c1e9171879d29a8296fae The caller to irange::intersect (wide_int, wide_int) must normalize the range. + | 0c888665dfbd5175256c674ee82d85bd0f7450f7 Implement value/mask tracking for irange. + | ... and 108 more + | linux commits: + | 973ef095906bc83947a07ea709112a76f74a0b6c Merge v6.1.38 + | 61fd484b2cf6bc8022e8e5ea6f693a9991740ac2 Linux 6.1.38 + | c50065a3927932cd9baf3d5c94c91b58c31200d5 drm/amd/display: Ensure vmin and vmax adjust for DCE + | 9d0b2afadfd71e9bedd593358bd7ac4701e46477 drm/amdgpu: Validate VM ioctl flags. + | fe56f507a11a72aeba7044a29653c049ce6c1374 docs: Set minimal gtags / GNU GLOBAL version to 6.6.5 + | ... and 9 more + | qemu commits: + | 97c81ef4b8e203d9620fd46e7eb77004563e3675 Merge tag 'pull-9p-20230706' of https://github.com/cschoenebeck/qemu into staging + | 822cb97cefe2416ce61fe8007ad69904bbe24502 Merge tag 'pull-target-arm-20230706' of https://git.linaro.org/people/pmaydell/qemu-arm into staging + | c41077235168140cdd4a34fce9bd95c3d30efe9c target/arm: Avoid over-length shift in arm_cpu_sve_finalize() error case + | c74138c6c040b62e941326a4fbb25a93fdd35b72 target/arm: Define neoverse-v1 + | 7d8c283e10dd818457e7c6a0f729fb03857253ac target/arm: Suppress more TCG unimplemented features in ID registers + | ... and 54 more + +Results changed to +# reset_artifacts: +-10 +# build_abe binutils: +-9 +# build_abe stage1: +-5 +# build_abe qemu: +-2 +# linux_n_obj: +7430 +# linux build successful: +all +# linux boot successful: +boot + +From +# reset_artifacts: +-10 +# build_abe binutils: +-9 +# build_abe stage1: +-5 +# build_abe qemu: +-2 +# linux_n_obj: +7430 +# linux build successful: +all +# linux boot successful: +boot + + + +-----------------8<--------------------------8<--------------------------8<-------------------------- +The information below can be used to reproduce a debug environment: + +Current build : https://ci.linaro.org/job/tcwg_kernel--gnu-master-arm-lts-defconfig-build/37/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_kernel--gnu-master-arm-lts-defconfig-build/36/artifact/artifacts + |