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authorTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-12-25 12:22:39 +0000
committerTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-12-25 12:22:39 +0000
commit39e02b4fbc83982e2c0ea6e502ef0132fc5f01a6 (patch)
tree1ee03697af767f764c502bf836e080fec9dc73b7 /notify/mail-body.txt
parent87fe319a2fc755b5f28c8c11ece58b627c3f60fb (diff)
onsuccess: #577: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/577/
Results : | # reset_artifacts: | -10 | # build_abe binutils: | -8 | # build_abe gcc: | -7 | # build_abe linux: | -5 | # build_abe glibc: | -4 | # build_abe gdb: | -3 | # build_abe dejagnu: | -1 | # build_abe check_gcc -- --set runtestflags=compile.exp --set runtestflags=execute.exp: | 0 check_regression status : 0
Diffstat (limited to 'notify/mail-body.txt')
-rw-r--r--notify/mail-body.txt53
1 files changed, 24 insertions, 29 deletions
diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index bda11b1..4d261bb 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -4,39 +4,34 @@ We appreciate that it might be difficult to find the necessary logs or reproduce
In master-aarch64 after:
- | 73 commits in binutils,gcc,linux,gdb
- | 59b6dbff95a sim: cris: rvdummy: delete unused variable
- | 9e6855c7cb2 sim: cgen: mark cgen_rtx_error noreturn
- | aea0b94653b sim: cgen: regenerate decode tables
- | 43fbcdcd03f sim: sh: refine pwsb & pwad nops
- | fed277fe151 sim: sh: fix plds Dz,MACL implementation
- | ... and 1 more commits in binutils
- | bd901d76734 RISC-V: XFail the signbit-5 run test for RVV
- | 3d03630b123 CRIS: Fix PR middle-end/113109; "throw" failing
- | d2ae7cb2ef9 Daily bump.
- | 310dc75e700 LoongArch: Add sign_extend pattern for 32-bit rotate shift
- | 78607d12297 LoongArch: Implement FCCmode reload and cstore<ANYF:mode>4
- | 861deac3b092 Linux 6.7-rc7
- | 3f82f1c3a036 Merge tag 'x86-urgent-2023-12-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
- | f969c91482e1 Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
- | 4b2ee6d2b33d Merge tag 'usb-6.7-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
- | a0652eb205b7 Merge tag 'char-misc-6.7-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
- | ... and 51 more commits in linux
- | 59b6dbff95a sim: cris: rvdummy: delete unused variable
- | 9e6855c7cb2 sim: cgen: mark cgen_rtx_error noreturn
- | aea0b94653b sim: cgen: regenerate decode tables
- | 43fbcdcd03f sim: sh: refine pwsb & pwad nops
- | fed277fe151 sim: sh: fix plds Dz,MACL implementation
- | ... and 1 more commits in gdb
+ | 46 commits in binutils,gcc,gdb
+ | ca86dbbdbc0 binutils: SECURITY: use https URI
+ | d27473e7c54 LoongArch: Add testsuit for DESC and tls transition and tls relaxation.
+ | ae296cc4525 LoongArch: Add support for TLS LD/GD/DESC relaxation
+ | 3898e04b8e4 LoongArch: Add tls transition support.
+ | 4f248d61eb9 LoongArch: Add support for TLSDESC in ld.
+ | ... and 12 more commits in binutils
+ | fd032cce216 middle-end: explicitly initialize vec_stmts [PR113132]
+ | 1bbb169fe6f rs6000: Change GPR2 to volatile & non-fixed register for function that does not use TOC [PR110320]
+ | 0beeddd6b1b RISC-V: Add one more ASM check in PR113112-1.c
+ | 59ecd5ff096 match: Improve `(a != b) ? (a + b) : (2 * a)` pattern [PR19832]
+ | f0269df25af Daily bump.
+ | ... and 7 more commits in gcc
+ | ca86dbbdbc0 binutils: SECURITY: use https URI
+ | d27473e7c54 LoongArch: Add testsuit for DESC and tls transition and tls relaxation.
+ | ae296cc4525 LoongArch: Add support for TLS LD/GD/DESC relaxation
+ | 3898e04b8e4 LoongArch: Add tls transition support.
+ | 4f248d61eb9 LoongArch: Add support for TLSDESC in ld.
+ | ... and 12 more commits in gdb
PASS
You can find the failure logs in *.log.1.xz files in
- - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/576/artifact/artifacts/00-sumfiles/ .
+ - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/577/artifact/artifacts/00-sumfiles/ .
The full lists of regressions and progressions are in
- - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/576/artifact/artifacts/notify/ .
+ - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/577/artifact/artifacts/notify/ .
The list of [ignored] baseline and flaky failures are in
- - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/576/artifact/artifacts/sumfiles/xfails.xfail .
+ - https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/577/artifact/artifacts/sumfiles/xfails.xfail .
The configuration of this build is:
CI config tcwg_gnu_native_fast_check_gcc master-aarch64
@@ -44,6 +39,6 @@ CI config tcwg_gnu_native_fast_check_gcc master-aarch64
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
-Current build : https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/576/artifact/artifacts
-Reference build : https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/575/artifact/artifacts
+Current build : https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/577/artifact/artifacts
+Reference build : https://ci.linaro.org/job/tcwg_gnu_native_fast_check_gcc--master-aarch64-build/576/artifact/artifacts