diff options
Diffstat (limited to 'notify/mail-body.txt')
-rw-r--r-- | notify/mail-body.txt | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/notify/mail-body.txt b/notify/mail-body.txt index d4b245c..e895fbc 100644 --- a/notify/mail-body.txt +++ b/notify/mail-body.txt @@ -2,29 +2,30 @@ Dear contributor, our automatic CI has detected problems related to your patch(e In arm-eabi cortex-m0 soft after: - | 24 commits in binutils,gcc,gdb,qemu - | ad233d0d746 Automatic date update in version.in - | 2a0b19f5259 Daily bump. - | 529909f9e92 [Committed] Avoid FAIL of gcc.target/i386/pr110792.c - | 1fc96cdd0a3 Add builtin_expect to predict that CPU supports cpuid to cpuid.h - | e3e6db43640 Disable loop distribution for loops with estimated iterations 0 - | 838237aeeba Fix profile update after peeled epilogues - | ad233d0d746 Automatic date update in version.in - | 9400601a68 Merge tag 'pull-tcg-20230806-3' of https://gitlab.com/rth7680/qemu into staging - | 3c4a8a8fda bsd-user: Remove last_brk - | 62cbf08150 linux-user: Remove last_brk - | 0662a626a7 linux-user: Properly set image_info.brk in flatload - | 2aea137a42 linux-user: Do not align brk with host page size - | ... and 12 more commits in qemu + | 32 commits in binutils,gcc,newlib,gdb + | 8d27b09d087 RISC-V: move comment describing rules for riscv_opcodes[] + | 2f98b09492b gdb/fortran: Align intrinsic/variable precedence + | 8ae83274d8c [committed] [RISC-V] Handle more cases in riscv_expand_conditional_move + | b57bd27cb68 MATCH: [PR109959] `(uns <= 1) & uns` could be optimized to `uns == 1` + | d8efc44d00c Use RPO order for sinking + | af6cfd7b663 Fix ICE in rtl check when bootstrap. + | aa63c20420d Improve -fopt-info-vec for basic-block vectorization + | ... and 19 more commits in gcc + | 2e7332d6b Cygwin: fix build failure due to redefinition of __restrict in sys/cdefs.h + | e66c63be6 sys/cdefs.h: introduce __restrict_arr, as in glibc + | 3c75fac13 sys/cdefs.h: fix for use __restrict in C++ + | b12934540 <sys/cdefs.h>: Decay expression passed to fallback + | 8d27b09d087 RISC-V: move comment describing rules for riscv_opcodes[] + | 2f98b09492b gdb/fortran: Align intrinsic/variable precedence PASS You can find the failure logs in *.log.1.xz files in - - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/13/artifact/artifacts/00-sumfiles/ . + - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/14/artifact/artifacts/00-sumfiles/ . The full lists of regressions and progressions are in - - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/13/artifact/artifacts/notify/ . + - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/14/artifact/artifacts/notify/ . The list of [ignored] baseline and flaky failures are in - - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/13/artifact/artifacts/sumfiles/xfails.xfail . + - https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/14/artifact/artifacts/sumfiles/xfails.xfail . The configuration of this build is: CI config tcwg_gnu_embed_check_binutils/master-thumb_m0_eabi @@ -32,6 +33,6 @@ CI config tcwg_gnu_embed_check_binutils/master-thumb_m0_eabi -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: -Current build : https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/13/artifact/artifacts -Reference build : https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/12/artifact/artifacts +Current build : https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/14/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_gnu_embed_check_binutils--master-thumb_m0_eabi-build/13/artifact/artifacts |