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authorTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-10-13 17:27:04 +0000
committerTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-10-13 17:27:04 +0000
commit25300de9a548505b89a495fe8e083d7c08877288 (patch)
treea0b17f309d6187cbf1bfe5374698d6c02853babd /notify/jira/description
parent1b55432754ddede3bfb9f0723b8dc0441efef03f (diff)
onsuccess: #621: 0: [TCWG CI] https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/621/
Results : | # reset_artifacts: | -10 | # init_abe_sysroot: | -3 | # build_abe glibc -- --disable install: | -2 | # build_abe dejagnu: | -1 | # build_abe check_glibc --check_patch linaro-local/dejagnu-sum -- --disable install: | 0 check_regression status : 0
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+commit glibc-2.38.9000-130-ga53451559d
+Author: caiyinyu <caiyinyu@loongson.cn>
+Date: Fri Sep 15 17:35:19 2023 +0800
+
+ LoongArch: Add glibc.cpu.hwcap support.
+
+ Key Points:
+ 1. On lasx & lsx platforms, We must use _dl_runtime_{profile, resolve}_{lsx, lasx}
+ to save vector registers.
+ 2. Via "tunables", users can choose str/mem_{lasx,lsx,unaligned} functions with
+ `export GLIBC_TUNABLES=glibc.cpu.hwcaps=LASX,...`.
+... 17 lines of the commit log omitted.
+
+* tcwg_glibc_check
+** master-arm
+*** PASS
+*** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/glibc/sha1/a53451559dc9cce765ea5bcbb92c4007e058e92b/tcwg_glibc_check/master-arm/details.txt
+*** https://ci.linaro.org/job/tcwg_glibc_check--master-arm-build/621/
+
+Latest data: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/glibc/sha1/a53451559dc9cce765ea5bcbb92c4007e058e92b/jira/yaml