From 82bddf9eb9479b38ac5b813506168195d90a1a22 Mon Sep 17 00:00:00 2001 From: TCWG BuildSlave Date: Thu, 28 Dec 2023 08:37:55 +0000 Subject: onsuccess: #321: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/321/ Results : | # reset_artifacts: | -10 | # true: | 0 | # build_abe bootstrap_debug: | 1 check_regression status : 0 --- notify/jira/comment-template.txt | 2 +- notify/mail-body.txt | 17 ++++++++--------- notify/mail-recipients.txt | 2 +- notify/mail-subject.txt | 2 +- 4 files changed, 11 insertions(+), 12 deletions(-) (limited to 'notify') diff --git a/notify/jira/comment-template.txt b/notify/jira/comment-template.txt index e5e8a96..2a68b7e 100644 --- a/notify/jira/comment-template.txt +++ b/notify/jira/comment-template.txt @@ -1,3 +1,3 @@ [GNU-692] Success -Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/320/artifact/artifacts/notify/mail-body.txt/*view*/ +Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/321/artifact/artifacts/notify/mail-body.txt/*view*/ diff --git a/notify/mail-body.txt b/notify/mail-body.txt index 1485da8..f807a65 100644 --- a/notify/mail-body.txt +++ b/notify/mail-body.txt @@ -4,13 +4,12 @@ We appreciate that it might be difficult to find the necessary logs or reproduce In bootstrap_build master-arm-bootstrap_debug after: - | 15 commits in gcc - | feaff27b290 LoongArch: Fix ICE when passing two same vector argument consecutively - | 183a51935cc LoongArch: Fix insn output of vec_concat templates for LASX. - | 245c9ef2b85 LoongArch: Fixed bug in *bstrins__for_ior_mask template. - | d92d26ff366 rs6000: Clean up the pre-checkings of expand_block_compare - | daea7777cee rs6000: Call library for block memory compare when optimizing for size - | ... and 10 more commits in gcc + | 5 commits in gcc + | 76f5542c483 RISC-V: Make dynamic LMUL cost model more accurate for conversion codes + | fb57e402d02 Daily bump. + | f19ceb2d49a LoongArch: Fix infinite secondary reloading of FCCmode [PR113148] + | 80b8f1e5350 LoongArch: Expand left rotate to right rotate with negated amount + | c4ac073d4fc RISC-V: Make known NITERS loop be aware of dynamic lmul cost model liveness information Results changed to # reset_artifacts: @@ -34,6 +33,6 @@ CI config tcwg_bootstrap_build master-arm-bootstrap_debug -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: -Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/320/artifact/artifacts -Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/319/artifact/artifacts +Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/321/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_debug-build/320/artifact/artifacts diff --git a/notify/mail-recipients.txt b/notify/mail-recipients.txt index 713ed5b..cd01696 100644 --- a/notify/mail-recipients.txt +++ b/notify/mail-recipients.txt @@ -1 +1 @@ -dje.gcc@gmail.com,bcc:tcwg-validation@linaro.org,cc:gcc-regression@gcc.gnu.org,cc:juzhe.zhong@rivai.ai,cc:liwei@loongson.cn,chenglulu@loongson.cn,dizhao@os.amperecomputing.com,guihaoc@gcc.gnu.org,gccadmin@gcc.gnu.org,pan2.li@intel.com,cc:panchenghui@loongson.cn +xry111@xry111.site,bcc:tcwg-validation@linaro.org,cc:gcc-regression@gcc.gnu.org,cc:juzhe.zhong@rivai.ai,gccadmin@gcc.gnu.org,pan2.li@intel.com diff --git a/notify/mail-subject.txt b/notify/mail-subject.txt index b76601a..d271645 100644 --- a/notify/mail-subject.txt +++ b/notify/mail-subject.txt @@ -1 +1 @@ -[Linaro-TCWG-CI] 15 commits in gcc: Success on arm +[Linaro-TCWG-CI] 5 commits in gcc: Success on arm -- cgit v1.2.3