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Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain@lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
In bootstrap_build master-arm-bootstrap_O3 after:
| 9 commits in gcc
| c177f28d601 [committed] RISC-V: Infrastructure for instruction fusion
| 07da9b7f13c [committed] Fix missing mode on a few unspec/unspec_volatile operands
| 06e7cc79fd3 testsuite: Don't use -mfloat128 with AIX.
| 56ca59a0315 Makefile.tpl: Avoid race condition in generating site.exp from the top level
| 78d132d73ec libcpp: split decls out to rich-location.h
| ... and 4 more commits in gcc
Results changed to
# reset_artifacts:
-10
# true:
0
# build_abe bootstrap_O3:
1
From
# reset_artifacts:
-10
# true:
0
# build_abe bootstrap_O3:
1
The configuration of this build is:
CI config tcwg_bootstrap_build/master-arm-bootstrap_O3
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/276/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/275/artifact/artifacts
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