diff options
Diffstat (limited to 'notify')
| -rw-r--r-- | notify/jira/comment-template.txt | 2 | ||||
| -rw-r--r-- | notify/mail-body.txt | 15 | ||||
| -rw-r--r-- | notify/mail-recipients.txt | 2 | ||||
| -rw-r--r-- | notify/mail-subject.txt | 2 |
4 files changed, 9 insertions, 12 deletions
diff --git a/notify/jira/comment-template.txt b/notify/jira/comment-template.txt index 75b51f2..f8e6a5e 100644 --- a/notify/jira/comment-template.txt +++ b/notify/jira/comment-template.txt @@ -1,3 +1,3 @@ [GNU-692] Success -Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/212/artifact/artifacts/notify/mail-body.txt/*view*/ +Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/213/artifact/artifacts/notify/mail-body.txt/*view*/ diff --git a/notify/mail-body.txt b/notify/mail-body.txt index daee892..f00560d 100644 --- a/notify/mail-body.txt +++ b/notify/mail-body.txt @@ -2,13 +2,10 @@ Dear contributor, our automatic CI has detected problems related to your patch(e In bootstrap_build master-arm-bootstrap_O3 after: - | 39 commits in gcc - | 86451305d8b RISC-V: Expand VLS mode to scalar mode move[PR111391] - | 9882b81410f RISC-V: Make SHA-256, SM3 and SM4 builtins operate on uint32_t - | a1751681867 RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned - | 23224f06c98 RISC-V: Support FP SGNJX autovec for VLS mode - | 37bbfd1c55d Daily bump. - | ... and 34 more commits in gcc + | 3 commits in gcc + | 51f1287e0a2 Remove xfail from gcc.dg/tree-ssa/20040204-1.c + | b34f8e705d9 rs6000: unnecessary clear after vctzlsbb in vec_first_match_or_eos_index + | 68845f7c4d5 Daily bump. Results changed to # reset_artifacts: @@ -32,6 +29,6 @@ CI config tcwg_bootstrap_build/master-arm-bootstrap_O3 -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: -Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/212/artifact/artifacts -Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/211/artifact/artifacts +Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/213/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/212/artifact/artifacts diff --git a/notify/mail-recipients.txt b/notify/mail-recipients.txt index bbe4e07..1ee90c8 100644 --- a/notify/mail-recipients.txt +++ b/notify/mail-recipients.txt @@ -1 +1 @@ -bcc:tcwg-validation@linaro.org,research_trasio@irq.a4lg.com,cc:gcc-regression@gcc.gnu.org,anlauf@gmx.de,cc:juzhe.zhong@rivai.ai,patrick@rivosinc.com,cc:gaofei@eswincomputing.com,gccadmin@gcc.gnu.org,dmalcolm@redhat.com,pan2.li@intel.com,ppalka@redhat.com,jwakely@redhat.com +bcc:tcwg-validation@linaro.org,cc:gcc-regression@gcc.gnu.org,apinski@marvell.com,gccadmin@gcc.gnu.org,aagarwa1@linux.ibm.com diff --git a/notify/mail-subject.txt b/notify/mail-subject.txt index 1b7a5c1..50cc0a2 100644 --- a/notify/mail-subject.txt +++ b/notify/mail-subject.txt @@ -1 +1 @@ -[Linaro-TCWG-CI] 39 commits in gcc: Success on arm +[Linaro-TCWG-CI] 3 commits in gcc: Success on arm |