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-rw-r--r--notify/jira/comment-template.txt2
-rw-r--r--notify/lnt_report.json4
-rw-r--r--notify/mail-body.txt18
-rw-r--r--notify/mail-recipients.txt2
-rw-r--r--notify/mail-subject.txt2
5 files changed, 14 insertions, 14 deletions
diff --git a/notify/jira/comment-template.txt b/notify/jira/comment-template.txt
index 168231f..85ed413 100644
--- a/notify/jira/comment-template.txt
+++ b/notify/jira/comment-template.txt
@@ -1,3 +1,3 @@
[GNU-692]
Success
-Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/232/artifact/artifacts/notify/mail-body.txt/*view*/
+Details: https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/233/artifact/artifacts/notify/mail-body.txt/*view*/
diff --git a/notify/lnt_report.json b/notify/lnt_report.json
index 7be5c65..9c1d5a0 100644
--- a/notify/lnt_report.json
+++ b/notify/lnt_report.json
@@ -6,10 +6,10 @@
"Run": {
"Info": {
"__report_version__": "1",
- "run_order": "232",
+ "run_order": "233",
"tag": "tcwg_test_gcc_check"
},
- "Start Time": "2023-10-06 22:43:35"
+ "Start Time": "2023-10-07 22:47:00"
},
"Tests": [
{
diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index 8af9e62..d310714 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -2,13 +2,13 @@ Dear contributor, our automatic CI has detected problems related to your patch(e
In bootstrap_build master-arm-bootstrap_O3 after:
- | 14 commits in gcc
- | ce658accc7b i386: Implement doubleword shift left by 1 bit using add+adc.
- | 2551e10038a Makefile.tpl: disable -Werror for feedback stage [PR111663]
- | fa8c99c4a42 i386: Split lea into shorter left shift by 2 or 3 bits with -Oz.
- | c1bc7513b1d RISC-V: const: hide mvconst splitter from IRA
- | 837a12a2276 Docs: Minimally document standard C/C++ attribute syntax.
- | ... and 9 more commits in gcc
+ | 21 commits in gcc
+ | 3bfde22cbfa aarch64: Enable Cortex-X4 CPU
+ | 066a43ce72a Revert "RISC-V: Add more run test for FP rounding autovec"
+ | d77ee4a7f7a [APX EGPR] Handle vex insns that only support GPR16 (5/5)
+ | f15b6ee259b [APX_EGPR] Handle legacy insns that only support GPR16 (4/5)
+ | 1328bb72548 [APX EGPR] Handle legacy insns that only support GPR16 (3/5)
+ | ... and 16 more commits in gcc
Results changed to
# reset_artifacts:
@@ -32,6 +32,6 @@ CI config tcwg_bootstrap_build/master-arm-bootstrap_O3
-----------------8<--------------------------8<--------------------------8<--------------------------
The information below can be used to reproduce a debug environment:
-Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/232/artifact/artifacts
-Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/231/artifact/artifacts
+Current build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/233/artifact/artifacts
+Reference build : https://ci.linaro.org/job/tcwg_bootstrap_build--master-arm-bootstrap_O3-build/232/artifact/artifacts
diff --git a/notify/mail-recipients.txt b/notify/mail-recipients.txt
index 27981c2..0e178de 100644
--- a/notify/mail-recipients.txt
+++ b/notify/mail-recipients.txt
@@ -1 +1 @@
-roger@nextmovesoftware.com,sandra@codesourcery.com,vineetg@rivosinc.com,bcc:tcwg-validation@linaro.org,ams@codesourcery.com,jakub@redhat.com,cc:gcc-regression@gcc.gnu.org,siarheit@google.com,tobias@codesourcery.com,patrick@rivosinc.com,gccadmin@gcc.gnu.org,pinskia@gmail.com,pan2.li@intel.com
+cc:saurabh.jha@arm.com,cc:lingling.kong@intel.com,bcc:tcwg-validation@linaro.org,guojiufu@linux.ibm.com,cc:gcc-regression@gcc.gnu.org,hongyu.wang@intel.com,lehua.ding@rivai.ai,gccadmin@gcc.gnu.org,pan2.li@intel.com,xuli1@eswincomputing.com,richard.sandiford@arm.com
diff --git a/notify/mail-subject.txt b/notify/mail-subject.txt
index 72a8790..b7b6cb6 100644
--- a/notify/mail-subject.txt
+++ b/notify/mail-subject.txt
@@ -1 +1 @@
-[Linaro-TCWG-CI] 14 commits in gcc: Success on arm
+[Linaro-TCWG-CI] 21 commits in gcc: Success on arm