diff options
author | TCWG BuildSlave <tcwg-buildslave@linaro.org> | 2023-10-04 22:23:46 +0000 |
---|---|---|
committer | TCWG BuildSlave <tcwg-buildslave@linaro.org> | 2023-10-04 22:24:16 +0000 |
commit | cc4e6eef93f321fb9d188ea66ff97a42b9a9f6d3 (patch) | |
tree | 9380685e170e0148252c0b6b0d89f714a1d73854 /notify/mail-body.txt | |
parent | 7e6d25bbc1a93620ddc1ff63f93555644035fae0 (diff) |
onsuccess: #24: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O3-build/24/
Results :
| # reset_artifacts:
| -10
| # build_bmk_llvm:
| -3
| # benchmark -- -O3_marm:
| 1
check_regression status : 0
Diffstat (limited to 'notify/mail-body.txt')
-rw-r--r-- | notify/mail-body.txt | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/notify/mail-body.txt b/notify/mail-body.txt index 0efa878..51bc2b6 100644 --- a/notify/mail-body.txt +++ b/notify/mail-body.txt @@ -2,16 +2,15 @@ Dear contributor, our automatic CI has detected problems related to your patch(e In CI config tcwg_bmk-code_speed-cpu2017rate/llvm-arm-master-O3 after: - | 410 commits in llvm - | a70485493803 [Clang][Doc] Added an open project for improving command line docs - | 09043a26c85d [mlir][arith] Add patterns to commute extension over vector extraction - | a7b4fd953f44 [clangd] Hover: resolve forwarding parameters for CalleeArgInfo - | 024bb62ffd07 [Driver] Pass --target2= to linker from baremetal toolchain - | 15f0491d3963 [NFC] Fix a mem-sanitizer found issue in AutoType - | ... and 405 more commits in llvm + | 171 commits in llvm + | 9809eb32a42c [gn build] Port a595b931f1f9 + | a595b931f1f9 [libc++] cuchar redeclares ::mbstate_t when it's in its own clang module + | 7f3b0e584513 [mlir][arith] Add narrowing patterns to commute more vector ops + | 3ff870881f5f [mlir][arith] Add narrowing patterns for other insertion ops + | 0f1a8b458d93 [flang][openacc][NFC] Fix typos segement -> segment + | ... and 166 more commits in llvm -the following benchmarks speeds up by more than 3%: -- sped up by 4% - 531.deepsjeng_r - from 11120 to 10673 perf samples
+No change Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI. @@ -28,6 +27,6 @@ This benchmarking CI is work-in-progress, and we welcome feedback and suggestion -----------------8<--------------------------8<--------------------------8<-------------------------- The information below can be used to reproduce a debug environment: -Current build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O3-build/23/artifact/artifacts -Reference build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O3-build/22/artifact/artifacts +Current build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O3-build/24/artifact/artifacts +Reference build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O3-build/23/artifact/artifacts |