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Dear contributor, our automatic CI has detected problems related to your patch(es). Please find some details below. If you have any questions, please follow up on linaro-toolchain@lists.linaro.org mailing list, Libera's #linaro-tcwg channel, or ping your favourite Linaro toolchain developer on the usual project channel.
In CI config tcwg_bmk-code_speed-cpu2017rate/llvm-arm-master-O2 after:
| 466 commits in llvm
| 815eab2d3cbb [DebugLocEntry][nfc] Remove redundant cast
| fea8c073561f [Support][Parallel] Add sequential mode to TaskGroup::spawn().
| 329bfcc8df47 [LangRef] Improve wording DW_OP_LLVM_entry_value
| e23891a3823e [AMDGPU][Disassembler] Fix a spurious error message in an instruction comment.
| c08dc8b5fbd0 [AMDGPU][Disassembler] Pre-commit a test on an error message generated in an instruction comment.
| ... and 461 more commits in llvm
No change
The configuration of this build is:
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
Configuration:
- Benchmark: SPEC CPU2017
- Toolchain: Clang + Glibc + LLVM Linker
- Version: all components were built from their tip of trunk
- Target: arm-linux-gnueabihf
- Compiler flags: O2
- Hardware: NVidia TK1 4x Cortex-A15
This benchmarking CI is work-in-progress, and we welcome feedback and suggestions at linaro-toolchain@lists.linaro.org . In our improvement plans is to add support for SPEC CPU2017 benchmarks and provide "perf report/annotate" data behind these reports.
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The information below can be used to reproduce a debug environment:
Current build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O2-build/24/artifact/artifacts
Reference build : https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-arm-master-O2-build/23/artifact/artifacts
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