onsuccess: #28: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bmk-code_size-coremark--gnu_eabi-arm_eabi-master-Os-build/28/

Results :
  | # reset_artifacts:
  | -10
  | # build_abe binutils:
  | -9
  | # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard:
  | -8
  | # build_abe newlib:
  | -6
  | # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard:
  | -5
  | # benchmark -- -Os_mthumb:
  | 1

check_regression status : 0

1 files changed, 11 insertions, 11 deletions

diff --git a/results-vs-prev/csv-results-1/size.csv b/results-vs-prev/csv-results-1/size.csv
index 0d4ea16..51bd8f8 100644
--- a/results-vs-prev/csv-results-1/size.csv
+++ b/results-vs-prev/csv-results-1/size.csv
@@ -1,5 +1,5 @@
 benchmark,symbol,size

-coremark,coremark,60860

+coremark,coremark,61492

 coremark,[.] abort,14

 coremark,[.] ADC1_2_IRQHandler,2

 coremark,[.] ADC3_IRQHandler,2

@@ -69,7 +69,7 @@ coremark,[.] crcu16,20
 coremark,[.] crcu32,20

 coremark,[.] crcu8,56

 coremark,[.] currentlocale,92

-coremark,[.] __d2b,192

+coremark,[.] __d2b,188

 coremark,[.] DebugMon_Handler,2

 coremark,[.] Default_Handler,2

 coremark,[.] DFSDM1_FLT0_IRQHandler,2

@@ -131,7 +131,7 @@ coremark,[.] __fp_unlock_all,20
 coremark,[.] __fputwc,152

 coremark,[.] fputwc,72

 coremark,[.] _fputwc_r,38

-coremark,[.] _free_r,504

+coremark,[.] _free_r,508

 coremark,[.] frexp,100

 coremark,[.] _fstat,30

 coremark,[.] _fstat_r,44

@@ -153,12 +153,12 @@ coremark,[.] hal_init,14
 coremark,[.] HAL_Init,48

 coremark,[.] HAL_InitTick,76

 coremark,[.] HAL_MspInit,2

-coremark,[.] HAL_NVIC_SetPriority,120

+coremark,[.] HAL_NVIC_SetPriority,124

 coremark,[.] HAL_NVIC_SetPriorityGrouping,36

 coremark,[.] HAL_PWREx_ControlVoltageScaling,128

 coremark,[.] HAL_PWREx_GetVoltageRange,16

 coremark,[.] HAL_RCC_ClockConfig,304

-coremark,[.] HAL_RCCEx_PeriphCLKConfig,1072

+coremark,[.] HAL_RCCEx_PeriphCLKConfig,1064

 coremark,[.] HAL_RCC_GetSysClockFreq,172

 coremark,[.] HAL_RCC_OscConfig,1520

 coremark,[.] HAL_SYSTICK_Config,52

@@ -248,8 +248,8 @@ coremark,[.] _raise,2
 coremark,[.] raise,88

 coremark,[.] _raise_r,82

 coremark,[.] __ratio,96

-coremark,[.] RCCEx_PLLSAI1_Config,284

-coremark,[.] RCCEx_PLLSAI2_Config,256

+coremark,[.] RCCEx_PLLSAI1_Config,288

+coremark,[.] RCCEx_PLLSAI2_Config,260

 coremark,[.] RCC_IRQHandler,2

 coremark,[.] RCC_SetFlashLatencyFromMSIRange,140

 coremark,[.] _read,128

@@ -274,7 +274,7 @@ coremark,[.] __seofread,4
 coremark,[.] __set_ctype,12

 coremark,[.] setlocale,24

 coremark,[.] _setlocale_r,552

-coremark,[.] __sflush_r,312

+coremark,[.] __sflush_r,308

 coremark,[.] __sfp,164

 coremark,[.] __sfp_lock_acquire,2

 coremark,[.] __sfp_lock_release,2

@@ -286,7 +286,7 @@ coremark,[.] __sigtramp_r,100
 coremark,[.] __sinit,32

 coremark,[.] __sjis_mbtowc,142

 coremark,[.] __sjis_wctomb,86

-coremark,[.] __smakebuf_r,220

+coremark,[.] __smakebuf_r,208

 coremark,[.] SPI1_IRQHandler,2

 coremark,[.] SPI2_IRQHandler,2

 coremark,[.] SPI3_IRQHandler,2

@@ -360,9 +360,9 @@ coremark,[.] USART3_IRQHandler,2
 coremark,[.] __utf8_mbtowc,466

 coremark,[.] __utf8_wctomb,156

 coremark,[.] vfiprintf,28

-coremark,[.] _vfiprintf_r,6502

+coremark,[.] _vfiprintf_r,6808

 coremark,[.] vfprintf,28

-coremark,[.] _vfprintf_r,10264

+coremark,[.] _vfprintf_r,10604

 coremark,[.] wcrtomb,88

 coremark,[.] _wcrtomb_r,76

 coremark,[.] wcsnrtombs,44