onsuccess: #330: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bmk_ci_gnu_eabi-build-tcwg_bmk_stm32-gnu_eabi-master-arm_eabi-coremark-Os/330/

Results :
  | # reset_artifacts:
  | -10
  | # build_abe binutils:
  | -9
  | # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard:
  | -8
  | # build_abe newlib:
  | -6
  | # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard:
  | -5
  | # benchmark -- -Os_mthumb:
  | 1

check_regression status : 0

3 files changed, 27 insertions, 29 deletions

diff --git a/mail/jira-body.txt b/mail/jira-body.txt
index 1fe61d0..4edf464 100644
--- a/mail/jira-body.txt
+++ b/mail/jira-body.txt
@@ -1,15 +1,14 @@
 After binutils/gcc/newlib 
-68830fbae98867f63720d250a18ce64f9f2f51fc Support Intel AMX-FP16
-5bba7eaef514362db4fa43969160831ec9c677d4 sim: Remove unused CXXFLAGS substitution
-44c4f3d4374b8cb80ff4094b1d8217c8ccdf25a2 Automatic date update in version.in
-9bb4d860222f2ffd5395ce84fec5dee0eb1f28b0 x86: Check VEX/EVEX encoding before checking vector operands
-8a3b17063e86ba7687896de7b5de870006a02ef5 gdb/python: break more dependencies between gdbpy_initialize_* functions
-... and 133 more binutils commits
-f56d48b2471c388401174029324e1f4c4b84fcdb RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
-cbd505700e09cfea8bdaa93ad6bd0514372e9034 RISC-V: Add RVV intrinsic basic framework.
-4e7ec7dbbbef3b4a83da5967b5f25e3be90c2dc6 i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.
-406675947d26ccbc2108e9689a2918bb36f61a63 Support Intel AVX-VNNI-INT8
-825d0041380378d978dfed6ea313e2ff9d2fce4c Support Intel AVX-IFMA
-... and 181 more gcc commits
-8c87ffd372232476ac5d1705dd32ddda54134c2b libgloss: riscv: Install machine/syscall.h
-5781871775fcba783938bc4ac645eba866711fc5 Cygwin: select: don't report read ready on a FIFO never opened for writing
+05962dc48c3c43cba106f0e2da492c1352489936 Automatic date update in version.in
+e60091e4d30f87e6b24d28829bf753369d338d3e sim: testsuite: update ignored .exp files [PR sim/29596]
+86ef36f655d13cd39ff573de079b35a142f8cf42 sim: testsuite: tweak parallel find invocation [PR sim/29596]
+89d5fc244fd6bbbb59c6d1b04eb2f048059b3dad sim: mips/ppc/riscv: re-add AC_CANONICAL_SYSTEM [PR sim/29439]
+df5ffabf1cfcb6b4f04d840ef54b37de379f1ba1 Automatic date update in version.in
+... and 19 more binutils commits
+6bfea64164c3f1989d34656ab96d03a7cda2143e RISC-V: Support (set (mem) (const_poly_int))
+f84e4fb44aa26b71fbc64e0532fd24d96e5caa3f RISC-V: Replace CONSTEXPR with constexpr
+3eea8c6f4ba9356726879aa4e21b99ad1ad5662e RISC-V: Remove unused TI/TF vector modes.
+65908ac84b840ded3331e000d303d0a5b4b426c8 RISC-V: Fix REG_CLASS_CONTENTS.
+00716b776200c2de6813ce706d2757eec4cb2735 Daily bump.
+... and 19 more gcc commits
+7589034cc3151bfac8cc3d3af5e91402a78e160b Cygwin: pty: Fix 'Bad address' error when running 'cmd.exe /c dir'
diff --git a/mail/mail-body.txt b/mail/mail-body.txt
index ee30be9..5d572b4 100644
--- a/mail/mail-body.txt
+++ b/mail/mail-body.txt
@@ -1,18 +1,17 @@
 After binutils/gcc/newlib 
-68830fbae98867f63720d250a18ce64f9f2f51fc Support Intel AMX-FP16
-5bba7eaef514362db4fa43969160831ec9c677d4 sim: Remove unused CXXFLAGS substitution
-44c4f3d4374b8cb80ff4094b1d8217c8ccdf25a2 Automatic date update in version.in
-9bb4d860222f2ffd5395ce84fec5dee0eb1f28b0 x86: Check VEX/EVEX encoding before checking vector operands
-8a3b17063e86ba7687896de7b5de870006a02ef5 gdb/python: break more dependencies between gdbpy_initialize_* functions
-... and 133 more binutils commits
-f56d48b2471c388401174029324e1f4c4b84fcdb RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
-cbd505700e09cfea8bdaa93ad6bd0514372e9034 RISC-V: Add RVV intrinsic basic framework.
-4e7ec7dbbbef3b4a83da5967b5f25e3be90c2dc6 i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.
-406675947d26ccbc2108e9689a2918bb36f61a63 Support Intel AVX-VNNI-INT8
-825d0041380378d978dfed6ea313e2ff9d2fce4c Support Intel AVX-IFMA
-... and 181 more gcc commits
-8c87ffd372232476ac5d1705dd32ddda54134c2b libgloss: riscv: Install machine/syscall.h
-5781871775fcba783938bc4ac645eba866711fc5 Cygwin: select: don't report read ready on a FIFO never opened for writing
+05962dc48c3c43cba106f0e2da492c1352489936 Automatic date update in version.in
+e60091e4d30f87e6b24d28829bf753369d338d3e sim: testsuite: update ignored .exp files [PR sim/29596]
+86ef36f655d13cd39ff573de079b35a142f8cf42 sim: testsuite: tweak parallel find invocation [PR sim/29596]
+89d5fc244fd6bbbb59c6d1b04eb2f048059b3dad sim: mips/ppc/riscv: re-add AC_CANONICAL_SYSTEM [PR sim/29439]
+df5ffabf1cfcb6b4f04d840ef54b37de379f1ba1 Automatic date update in version.in
+... and 19 more binutils commits
+6bfea64164c3f1989d34656ab96d03a7cda2143e RISC-V: Support (set (mem) (const_poly_int))
+f84e4fb44aa26b71fbc64e0532fd24d96e5caa3f RISC-V: Replace CONSTEXPR with constexpr
+3eea8c6f4ba9356726879aa4e21b99ad1ad5662e RISC-V: Remove unused TI/TF vector modes.
+65908ac84b840ded3331e000d303d0a5b4b426c8 RISC-V: Fix REG_CLASS_CONTENTS.
+00716b776200c2de6813ce706d2757eec4cb2735 Daily bump.
+... and 19 more gcc commits
+7589034cc3151bfac8cc3d3af5e91402a78e160b Cygwin: pty: Fix 'Bad address' error when running 'cmd.exe /c dir'
 
 Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection.  Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
 
diff --git a/mail/mail-subject.txt b/mail/mail-subject.txt
index 58f277d..0e99853 100644
--- a/mail/mail-subject.txt
+++ b/mail/mail-subject.txt
@@ -1 +1 @@
-[TCWG CI] No change after binutils/gcc/newlib: 326 commits
+[TCWG CI] No change after binutils/gcc/newlib: 49 commits