summaryrefslogtreecommitdiff
path: root/mail
diff options
context:
space:
mode:
authorTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-10-02 11:46:51 +0000
committerTCWG BuildSlave <tcwg-buildslave@linaro.org>2023-10-02 11:46:52 +0000
commit6710beaa4ad35b635574733212a977185dee3c40 (patch)
tree6810d938582321a6ae0361444d8dbdf64a1ec238 /mail
parent63e5371c0264692d91880fee1cdfdb4bbbe564c8 (diff)
onsuccess: #329: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_bmk_ci_gnu_eabi-build-tcwg_bmk_stm32-gnu_eabi-master-arm_eabi-coremark-Os/329/
Results : | # reset_artifacts: | -10 | # build_abe binutils: | -9 | # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard: | -8 | # build_abe newlib: | -6 | # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer --set gcc_override_configure=--disable-multilib --set gcc_override_configure=--with-cpu=cortex-m4 --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--with-float=hard: | -5 | # benchmark -- -Os_mthumb: | 1 check_regression status : 0
Diffstat (limited to 'mail')
-rw-r--r--mail/jira-body.txt28
-rw-r--r--mail/mail-body.txt28
-rw-r--r--mail/mail-subject.txt2
3 files changed, 31 insertions, 27 deletions
diff --git a/mail/jira-body.txt b/mail/jira-body.txt
index 8cabfb3..1fe61d0 100644
--- a/mail/jira-body.txt
+++ b/mail/jira-body.txt
@@ -1,13 +1,15 @@
-After binutils/gcc
-9e65489ac29a2b38417c4f17acf82187343751a6 Re-apply "Pass PKG_CONFIG_PATH down from top-level Makefile"
-1639fab33b5932e1a5e88e29273996f70047da85 gdb: rename target_read_auxv(target_ops *) to target_read_auxv_raw
-8652404e813a895dfebe8591b30e90328b6e6898 Automatic date update in version.in
-b95bb5267e30b26d0831b6ba01d9bd25835d1046 Re: Merge configure.ac from gcc project
-82d23ca811ab365217fdc9bda215e23adb5e4a30 gdb: fix auxv caching
-... and 68 more binutils commits
-9d9e793b6543745a5a3aae9032478c056f167c9c Libvtv-test: Fix bug that scansarif.exp cannot be found in libvtv regression test.
-ab332cd78d083edb2fddaa3c02578cafade12725 Daily bump.
-2c328e58c5d7cca10dd404ad8f81ec7664db1fbf Enable support for atomic primitives on SPARC/Linux
-53955284c031a17e6e49e730ef8947fe557ff35e Fortran: check types of source expressions before conversion [PR107215]
-23c3cbaed36f6d2f3a7a64f6ebda69329723514b libstdc++: Fix bootstrap for --disable-threads build [PR107221]
-... and 135 more gcc commits
+After binutils/gcc/newlib
+68830fbae98867f63720d250a18ce64f9f2f51fc Support Intel AMX-FP16
+5bba7eaef514362db4fa43969160831ec9c677d4 sim: Remove unused CXXFLAGS substitution
+44c4f3d4374b8cb80ff4094b1d8217c8ccdf25a2 Automatic date update in version.in
+9bb4d860222f2ffd5395ce84fec5dee0eb1f28b0 x86: Check VEX/EVEX encoding before checking vector operands
+8a3b17063e86ba7687896de7b5de870006a02ef5 gdb/python: break more dependencies between gdbpy_initialize_* functions
+... and 133 more binutils commits
+f56d48b2471c388401174029324e1f4c4b84fcdb RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
+cbd505700e09cfea8bdaa93ad6bd0514372e9034 RISC-V: Add RVV intrinsic basic framework.
+4e7ec7dbbbef3b4a83da5967b5f25e3be90c2dc6 i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.
+406675947d26ccbc2108e9689a2918bb36f61a63 Support Intel AVX-VNNI-INT8
+825d0041380378d978dfed6ea313e2ff9d2fce4c Support Intel AVX-IFMA
+... and 181 more gcc commits
+8c87ffd372232476ac5d1705dd32ddda54134c2b libgloss: riscv: Install machine/syscall.h
+5781871775fcba783938bc4ac645eba866711fc5 Cygwin: select: don't report read ready on a FIFO never opened for writing
diff --git a/mail/mail-body.txt b/mail/mail-body.txt
index a486506..ee30be9 100644
--- a/mail/mail-body.txt
+++ b/mail/mail-body.txt
@@ -1,16 +1,18 @@
-After binutils/gcc
-9e65489ac29a2b38417c4f17acf82187343751a6 Re-apply "Pass PKG_CONFIG_PATH down from top-level Makefile"
-1639fab33b5932e1a5e88e29273996f70047da85 gdb: rename target_read_auxv(target_ops *) to target_read_auxv_raw
-8652404e813a895dfebe8591b30e90328b6e6898 Automatic date update in version.in
-b95bb5267e30b26d0831b6ba01d9bd25835d1046 Re: Merge configure.ac from gcc project
-82d23ca811ab365217fdc9bda215e23adb5e4a30 gdb: fix auxv caching
-... and 68 more binutils commits
-9d9e793b6543745a5a3aae9032478c056f167c9c Libvtv-test: Fix bug that scansarif.exp cannot be found in libvtv regression test.
-ab332cd78d083edb2fddaa3c02578cafade12725 Daily bump.
-2c328e58c5d7cca10dd404ad8f81ec7664db1fbf Enable support for atomic primitives on SPARC/Linux
-53955284c031a17e6e49e730ef8947fe557ff35e Fortran: check types of source expressions before conversion [PR107215]
-23c3cbaed36f6d2f3a7a64f6ebda69329723514b libstdc++: Fix bootstrap for --disable-threads build [PR107221]
-... and 135 more gcc commits
+After binutils/gcc/newlib
+68830fbae98867f63720d250a18ce64f9f2f51fc Support Intel AMX-FP16
+5bba7eaef514362db4fa43969160831ec9c677d4 sim: Remove unused CXXFLAGS substitution
+44c4f3d4374b8cb80ff4094b1d8217c8ccdf25a2 Automatic date update in version.in
+9bb4d860222f2ffd5395ce84fec5dee0eb1f28b0 x86: Check VEX/EVEX encoding before checking vector operands
+8a3b17063e86ba7687896de7b5de870006a02ef5 gdb/python: break more dependencies between gdbpy_initialize_* functions
+... and 133 more binutils commits
+f56d48b2471c388401174029324e1f4c4b84fcdb RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.
+cbd505700e09cfea8bdaa93ad6bd0514372e9034 RISC-V: Add RVV intrinsic basic framework.
+4e7ec7dbbbef3b4a83da5967b5f25e3be90c2dc6 i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.
+406675947d26ccbc2108e9689a2918bb36f61a63 Support Intel AVX-VNNI-INT8
+825d0041380378d978dfed6ea313e2ff9d2fce4c Support Intel AVX-IFMA
+... and 181 more gcc commits
+8c87ffd372232476ac5d1705dd32ddda54134c2b libgloss: riscv: Install machine/syscall.h
+5781871775fcba783938bc4ac645eba866711fc5 Cygwin: select: don't report read ready on a FIFO never opened for writing
Below reproducer instructions can be used to re-build both "first_bad" and "last_good" cross-toolchains used in this bisection. Naturally, the scripts will fail when triggerring benchmarking jobs if you don\'t have access to Linaro TCWG CI.
diff --git a/mail/mail-subject.txt b/mail/mail-subject.txt
index 35fc26e..58f277d 100644
--- a/mail/mail-subject.txt
+++ b/mail/mail-subject.txt
@@ -1 +1 @@
-[TCWG CI] No change after binutils/gcc: 213 commits
+[TCWG CI] No change after binutils/gcc/newlib: 326 commits