force: #458: 1: [TCWG CI] https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/

Results :
  | # reset_artifacts:
  | -10
  | # build_aosp_toolchain:
  | -3
  | # build_shadow_llvm:
  | -2
  | # build_aosp:
  | -1
  | # shadow build has no errors
  | 0
  | # shadow.size present
  | 1
  | # 1,out/soong/.intermediates/art/runtime/libart/android_arm64_armv8-2a_cortex-a55_shared_apex31/85eaf79f2cdb3360398d24cccc67f3ae/unstripped/libart.so increased in size by 1% from 7041696 to 7097520

check_regression status : 1

10 files changed, 186 insertions, 12 deletions

diff --git a/notify/jira/comment-card.txt b/notify/jira/comment-card.txt
new file mode 100644
index 0000000..fe24b04
--- /dev/null
+++ b/notify/jira/comment-card.txt
@@ -0,0 +1,3 @@
+[LLVM-928]
+Failure
+Details: https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/artifact/artifacts/notify/mail-body.txt/*view*/
diff --git a/notify/jira/comment-template.txt b/notify/jira/comment-template.txt
index 796b2c5..8a9f98b 100644
--- a/notify/jira/comment-template.txt
+++ b/notify/jira/comment-template.txt
@@ -1,3 +1,4 @@
 [GNU-692]
-Success
-Details: https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/457/artifact/artifacts/notify/mail-body.txt/*view*/
+https://linaro.atlassian.net/browse/LLVM-928
+Failure
+Details: https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/artifact/artifacts/notify/mail-body.txt/*view*/
diff --git a/notify/jira/components b/notify/jira/components
new file mode 100644
index 0000000..8072713
--- /dev/null
+++ b/notify/jira/components
@@ -0,0 +1 @@
+LLVM
diff --git a/notify/jira/description b/notify/jira/description
new file mode 100644
index 0000000..8141a64
--- /dev/null
+++ b/notify/jira/description
@@ -0,0 +1,53 @@
+commit llvmorg-18-init-5853-gcbdccb30c23f
+Author: Guozhi Wei <carrot@google.com>
+Date:   Fri Sep 15 19:52:50 2023 +0000
+
+    [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
+    
+    If a virtual register is not assigned preferred physical register, it means some
+    COPY instructions will be changed to real register move instructions. In this
+    case we can try to split the virtual register in colder blocks, if success, the
+    original COPY instructions can be deleted, and the new COPY instructions in
+    colder blocks will be generated as register move instructions. It results in
+... 7 lines of the commit log omitted.
+
+* tcwg_aosp-code_size-dex2oat
+** oriole-master
+*** Failure
+*** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_aosp-code_size-dex2oat/oriole-master/details.txt
+*** https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/
+* tcwg_bmk-code_size-cpu2017fast
+** llvm-aarch64-master-O3
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017fast/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017fast--llvm-aarch64-master-O3-build/71/
+* tcwg_bmk-code_size-cpu2017rate
+** llvm-arm-master-O2
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O2-build/70/
+** llvm-arm-master-O3
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 11%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O3-build/59/
+* tcwg_bmk-code_size-spec2k6
+** llvm-aarch64-master-O3
+*** 453.povray:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-aarch64-master-O3-build/60/
+** llvm-arm-master-Os
+*** 401.bzip2 grew in size by 9%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-arm-master-Os/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-arm-master-Os-build/71/
+* tcwg_bmk-code_speed-cpu2017rate
+** llvm-aarch64-master-O3
+*** 526.blender_r slowed down by 4%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_speed-cpu2017rate/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-aarch64-master-O3-build/98/
+* tcwg_bmk-fujitsu_speed-cpu2017speed
+** llvm-aarch64-master-O3
+*** 641.leela_s:[.] _ZN9FastState16play_random_moveEi slowed down by 32%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-fujitsu_speed-cpu2017speed/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-fujitsu_speed-cpu2017speed--llvm-aarch64-master-O3-build/149/
+
+Latest data: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/jira/yaml
diff --git a/notify/jira/key b/notify/jira/key
new file mode 100644
index 0000000..646e87e
--- /dev/null
+++ b/notify/jira/key
@@ -0,0 +1 @@
+LLVM-928
diff --git a/notify/jira/startdate b/notify/jira/startdate
new file mode 100644
index 0000000..4ef0b1a
--- /dev/null
+++ b/notify/jira/startdate
@@ -0,0 +1 @@
+2023-09-15
diff --git a/notify/jira/summary b/notify/jira/summary
new file mode 100644
index 0000000..9fd846f
--- /dev/null
+++ b/notify/jira/summary
@@ -0,0 +1 @@
+llvmorg-18-init-5853-gcbdccb30c23f: Failure
diff --git a/notify/jira/yaml b/notify/jira/yaml
new file mode 100644
index 0000000..ad38ba9
--- /dev/null
+++ b/notify/jira/yaml
@@ -0,0 +1,61 @@
+- Project: LLVM
+  IssueType: Sub-task
+  Key: LLVM-928
+  Summary: |
+    llvmorg-18-init-5853-gcbdccb30c23f: Failure
+  Components: LLVM
+  Start date: 2023-09-15
+  Description: |
+    commit llvmorg-18-init-5853-gcbdccb30c23f
+    Author: Guozhi Wei <carrot@google.com>
+    Date:   Fri Sep 15 19:52:50 2023 +0000
+    
+        [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
+        
+        If a virtual register is not assigned preferred physical register, it means some
+        COPY instructions will be changed to real register move instructions. In this
+        case we can try to split the virtual register in colder blocks, if success, the
+        original COPY instructions can be deleted, and the new COPY instructions in
+        colder blocks will be generated as register move instructions. It results in
+    ... 7 lines of the commit log omitted.
+    
+    * tcwg_aosp-code_size-dex2oat
+    ** oriole-master
+    *** Failure
+    *** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_aosp-code_size-dex2oat/oriole-master/details.txt
+    *** https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/
+    * tcwg_bmk-code_size-cpu2017fast
+    ** llvm-aarch64-master-O3
+    *** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017fast/llvm-aarch64-master-O3/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017fast--llvm-aarch64-master-O3-build/71/
+    * tcwg_bmk-code_size-cpu2017rate
+    ** llvm-arm-master-O2
+    *** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O2-build/70/
+    ** llvm-arm-master-O3
+    *** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 11%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O3/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O3-build/59/
+    * tcwg_bmk-code_size-spec2k6
+    ** llvm-aarch64-master-O3
+    *** 453.povray:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+    *** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-aarch64-master-O3/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-aarch64-master-O3-build/60/
+    ** llvm-arm-master-Os
+    *** 401.bzip2 grew in size by 9%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-arm-master-Os/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-arm-master-Os-build/71/
+    * tcwg_bmk-code_speed-cpu2017rate
+    ** llvm-aarch64-master-O3
+    *** 526.blender_r slowed down by 4%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_speed-cpu2017rate/llvm-aarch64-master-O3/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-aarch64-master-O3-build/98/
+    * tcwg_bmk-fujitsu_speed-cpu2017speed
+    ** llvm-aarch64-master-O3
+    *** 641.leela_s:[.] _ZN9FastState16play_random_moveEi slowed down by 32%
+    *** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-fujitsu_speed-cpu2017speed/llvm-aarch64-master-O3/details.txt
+    *** https://ci.linaro.org/job/tcwg_bmk-fujitsu_speed-cpu2017speed--llvm-aarch64-master-O3-build/149/
+    
+    Latest data: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/jira/yaml
diff --git a/notify/mail-body.txt b/notify/mail-body.txt
index 04a9bbc..b2ee318 100644
--- a/notify/mail-body.txt
+++ b/notify/mail-body.txt
@@ -2,13 +2,18 @@ Dear contributor, our automatic CI has detected problems related to your patch(e
 
 In CI config tcwg_aosp-code_size-dex2oat/oriole-master after:
 
-  | 13 commits in toolchain_superproject
-  | 818d1986283 Merge "Add mmap syscall benchmarks" into main
-  | 8b014e4a5ee Added repo manifest.
-  | 3b4c957f895 Merge "Don't memset() in the soinfo constructor." into main
-  | 91c7964081a test_compiler: build device-tests and platform_tests by default
-  | 42270b62a7a Merge "Match new google benchmark help output." into main
-  | ... and 8 more commits in toolchain_superproject
+  | commit llvmorg-18-init-5853-gcbdccb30c23f
+  | Author: Guozhi Wei <carrot@google.com>
+  | Date:   Fri Sep 15 19:52:50 2023 +0000
+  | 
+  |     [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register
+  |     
+  |     If a virtual register is not assigned preferred physical register, it means some
+  |     COPY instructions will be changed to real register move instructions. In this
+  |     case we can try to split the virtual register in colder blocks, if success, the
+  |     original COPY instructions can be deleted, and the new COPY instructions in
+  |     colder blocks will be generated as register move instructions. It results in
+  | ... 7 lines of the commit log omitted.
 
 Results changed to
 # reset_artifacts:
@@ -23,6 +28,7 @@ Results changed to
 0
 # shadow.size present
 1
+# 1,out/soong/.intermediates/art/runtime/libart/android_arm64_armv8-2a_cortex-a55_shared_apex31/85eaf79f2cdb3360398d24cccc67f3ae/unstripped/libart.so increased in size by 1% from 7041696 to 7097520
 
 From
 # reset_artifacts:
@@ -43,6 +49,52 @@ From
 -----------------8<--------------------------8<--------------------------8<--------------------------
 The information below can be used to reproduce a debug environment:
 
-Current build   : https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/457/artifact/artifacts
-Reference build : https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/439/artifact/artifacts
+Current build   : https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/artifact/artifacts
+Reference build : https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/457/artifact/artifacts
+
+Reproduce last good and first bad builds: https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_aosp-code_size-dex2oat/oriole-master/reproduction_instructions.txt
+
+Full commit : https://github.com/llvm/llvm-project/commit/cbdccb30c23f71f20d05b19256232419e7c5e517
+
+Latest bug report status : https://linaro.atlassian.net/browse/LLVM-928
+
+List of configurations that regressed due to this commit :
+* tcwg_aosp-code_size-dex2oat
+** oriole-master
+*** Failure
+*** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_aosp-code_size-dex2oat/oriole-master/details.txt
+*** https://ci.linaro.org/job/tcwg_aosp-code_size-dex2oat--oriole-master-build/458/
+* tcwg_bmk-code_size-cpu2017fast
+** llvm-aarch64-master-O3
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017fast/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017fast--llvm-aarch64-master-O3-build/71/
+* tcwg_bmk-code_size-cpu2017rate
+** llvm-arm-master-O2
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O2/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O2-build/70/
+** llvm-arm-master-O3
+*** 511.povray_r:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 11%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-cpu2017rate/llvm-arm-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-cpu2017rate--llvm-arm-master-O3-build/59/
+* tcwg_bmk-code_size-spec2k6
+** llvm-aarch64-master-O3
+*** 453.povray:[.] _ZN3povL24All_Sphere_IntersectionsEPNS_13Object_StructEPNS_10Ray_StructEPNS_13istack_structE grew in size by 12%
+*** https://git-us.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-aarch64-master-O3-build/60/
+** llvm-arm-master-Os
+*** 401.bzip2 grew in size by 9%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_size-spec2k6/llvm-arm-master-Os/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_size-spec2k6--llvm-arm-master-Os-build/71/
+* tcwg_bmk-code_speed-cpu2017rate
+** llvm-aarch64-master-O3
+*** 526.blender_r slowed down by 4%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-code_speed-cpu2017rate/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-code_speed-cpu2017rate--llvm-aarch64-master-O3-build/98/
+* tcwg_bmk-fujitsu_speed-cpu2017speed
+** llvm-aarch64-master-O3
+*** 641.leela_s:[.] _ZN9FastState16play_random_moveEi slowed down by 32%
+*** https://git.linaro.org/toolchain/ci/interesting-commits.git/plain/llvm/sha1/cbdccb30c23f71f20d05b19256232419e7c5e517/tcwg_bmk-fujitsu_speed-cpu2017speed/llvm-aarch64-master-O3/details.txt
+*** https://ci.linaro.org/job/tcwg_bmk-fujitsu_speed-cpu2017speed--llvm-aarch64-master-O3-build/149/
 
diff --git a/notify/mail-subject.txt b/notify/mail-subject.txt
index c85cb5e..c00d1db 100644
--- a/notify/mail-subject.txt
+++ b/notify/mail-subject.txt
@@ -1 +1 @@
-[Linaro-TCWG-CI] 13 commits in toolchain_superproject: Success
+[Linaro-TCWG-CI] llvmorg-18-init-5853-gcbdccb30c23f: Failure