CHROMIUM: drm/virtio: rebase zero-copy patches to virgl/drm-misc-next

* Adds RESOURCE_MAP/RESOURCE_UNMAP
* Removes guest_memory_type/guest_caching_type in favor of a bitmask
* Removes EXECBUFFER_v2 until Q3
* Renames HOST_COHERENT to HOST_VISIBLE

BUG=chromium:924405
TEST=compile

Test:
- dEQP-VK.smoke* pass w/ gfxstream and host coherent memory enabled
- launch_cvd with 2d, virgl, and gfxstream modes work with current
- launch_cvd with 2d, virgl, and gfxstream modes work w/ crosvm modified
for host coherent memory
(https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2035595)

Signed-off-by: Lingfeng Yang <lfy@google.com>
Bug: 153580313
Change-Id: I04052c3d164c77c713bbc7251c357fd43653fa50

2 files changed, 92 insertions, 127 deletions

diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
index 8211b48f2241..6b9c8a5f87e7 100644
--- a/include/uapi/drm/virtgpu_drm.h
+++ b/include/uapi/drm/virtgpu_drm.h
@@ -46,9 +46,7 @@ extern "C" {
 #define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
 #define DRM_VIRTGPU_WAIT     0x08
 #define DRM_VIRTGPU_GET_CAPS  0x09
-#define DRM_VIRTGPU_RESOURCE_CREATE_V2 0x0a
-#define DRM_VIRTGPU_ALLOCATION_METADATA_REQUEST  0x0b
-#define DRM_VIRTGPU_ALLOCATION_METADATA_RESPONSE 0x0c
+#define DRM_VIRTGPU_RESOURCE_CREATE_BLOB 0x0a
 
 #define VIRTGPU_EXECBUF_FENCE_FD_IN	0x01
 #define VIRTGPU_EXECBUF_FENCE_FD_OUT	0x02
@@ -74,19 +72,8 @@ struct drm_virtgpu_execbuffer {
 
 #define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
 #define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */
-#define VIRTGPU_PARAM_RESOURCE_V2 3
-#define VIRTGPU_PARAM_SHARED_GUEST 4
-#define VIRTGPU_PARAM_HOST_COHERENT 5
-
-#define VIRTGPU_MEMORY_UNDEFINED 0
-#define VIRTGPU_MEMORY_TRANSFER 1
-#define VIRTGPU_MEMORY_SHARED_GUEST 2
-#define VIRTGPU_MEMORY_HOST_COHERENT 3
-
-#define VIRTGPU_UNDEFINED_CACHING 0
-#define VIRTGPU_CACHED 1
-#define VIRTGPU_WRITE_COMBINE 2
-#define VIRTGPU_UNCACHED 3
+#define VIRTGPU_PARAM_RESOURCE_BLOB 3 /* DRM_VIRTGPU_RESOURCE_CREATE_BLOB */
+#define VIRTGPU_PARAM_HOST_VISIBLE 4
 
 struct drm_virtgpu_getparam {
 	__u64 param;
@@ -162,29 +149,27 @@ struct drm_virtgpu_get_caps {
 	__u32 pad;
 };
 
-struct drm_virtgpu_resource_create_v2 {
-	__u32 resource_id;
-	__u32 guest_memory_type;
-	__u32 caching_type;
-	__u32 args_size;
-	__u32 gem_handle;
-	__u64 size;
-	__u64 args; /* void */
-};
+struct drm_virtgpu_resource_create_blob {
+#define VIRTGPU_RES_BLOB_GUEST_MASK   0x000f
+#define VIRTGPU_RES_BLOB_GUEST_NONE   0x0000
+#define VIRTGPU_RES_BLOB_GUEST_SYSTEM 0x0001
 
-struct drm_virtgpu_allocation_metadata_request {
-	__u32 request_id;
-	__u32 pad;
-	__u32 request_size;
-	__u32 response_size;
-	__u64 request; /* void */
-};
+#define VIRTGPU_RES_BLOB_HOST_MASK 0x00f0
+#define VIRTGPU_RES_BLOB_HOST_NONE 0x0000
+#define VIRTGPU_RES_BLOB_HOST      0x0010
 
-struct drm_virtgpu_allocation_metadata_response {
-	__u32 request_id;
-	__u32 pad;
-	__u32 response_size;
-	__u64 response; /* void */
+#define VIRTGPU_RES_BLOB_USE_MASK         0x0f00
+#define VIRTGPU_RES_BLOB_USE_NONE         0x0000
+#define VIRTGPU_RES_BLOB_USE_MAPPABLE     0x0100
+#define VIRTGPU_RES_BLOB_USE_SHAREABLE    0x0200
+#define VIRTGPU_RES_BLOB_USE_CROSS_DEVICE 0x0400
+	__u32 flags;
+	__u32 bo_handle;
+	__u32 res_handle;
+	__u32 cmd_size;
+	__u64 cmd;
+	__u64 size;
+	__u64 memory_id;
 };
 
 #define DRM_IOCTL_VIRTGPU_MAP \
@@ -222,17 +207,9 @@ struct drm_virtgpu_allocation_metadata_response {
 	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
 	struct drm_virtgpu_get_caps)
 
-#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_V2 \
-	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE_V2, \
-	struct drm_virtgpu_resource_create_v2)
-
-#define DRM_IOCTL_VIRTGPU_ALLOCATION_METADATA_REQUEST \
-	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_ALLOCATION_METADATA_REQUEST, \
-	struct drm_virtgpu_allocation_metadata_request)
-
-#define DRM_IOCTL_VIRTGPU_ALLOCATION_METADATA_RESPONSE \
-	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_ALLOCATION_METADATA_RESPONSE, \
-	struct drm_virtgpu_allocation_metadata_response)
+#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB				\
+	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE_BLOB,	\
+		struct drm_virtgpu_resource_create_blob)
 
 #if defined(__cplusplus)
 }
diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gpu.h
index 3c3bb3342b7b..cd303076225e 100644
--- a/include/uapi/linux/virtio_gpu.h
+++ b/include/uapi/linux/virtio_gpu.h
@@ -54,20 +54,20 @@
  * VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID
  */
 #define VIRTIO_GPU_F_RESOURCE_UUID       2
-
 /*
- * VIRTIO_GPU_CMD_ALLOCATION_METADATA
- * VIRTIO_GPU_CMD_RESOURCE_CREATE_V2
+ * VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB
  */
-#define VIRTIO_GPU_F_RESOURCE_V2         3
+#define VIRTIO_GPU_F_RESOURCE_BLOB       3
 /*
- * Ability to turn guest pages into host buffers.
+ * VIRTIO_GPU_CMD_RESOURCE_MAP
+ * VIRTIO_GPU_CMD_RESOURCE_UMAP
  */
-#define VIRTIO_GPU_F_SHARED_GUEST        4
+#define VIRTIO_GPU_F_HOST_VISIBLE        4
 /*
- * Can inject host pages into guest.
+ * VIRTIO_GPU_CMD_CTX_CREATE_V2
  */
-#define VIRTIO_GPU_F_HOST_COHERENT       5
+#define VIRTIO_GPU_F_VULKAN              5
+
 enum virtio_gpu_ctrl_type {
 	VIRTIO_GPU_UNDEFINED = 0,
 
@@ -94,9 +94,9 @@ enum virtio_gpu_ctrl_type {
 	VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D,
 	VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D,
 	VIRTIO_GPU_CMD_SUBMIT_3D,
-	VIRTIO_GPU_CMD_RESOURCE_CREATE_V2,
-	VIRTIO_GPU_CMD_RESOURCE_CREATE_V2_UNREF,
-	VIRTIO_GPU_CMD_ALLOCATION_METADATA,
+	VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB,
+	VIRTIO_GPU_CMD_RESOURCE_MAP,
+	VIRTIO_GPU_CMD_RESOURCE_UNMAP,
 
 	/* cursor commands */
 	VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
@@ -109,14 +109,13 @@ enum virtio_gpu_ctrl_type {
 	VIRTIO_GPU_RESP_OK_CAPSET,
 	VIRTIO_GPU_RESP_OK_EDID,
 	VIRTIO_GPU_RESP_OK_RESOURCE_UUID,
+	VIRTIO_GPU_RESP_OK_MAP_INFO,
 
 	/* CHROMIUM: legacy responses */
 	VIRTIO_GPU_RESP_OK_RESOURCE_PLANE_INFO_LEGACY = 0x1104,
-	VIRTIO_GPU_RESP_OK_ALLOCATION_METADATA_LEGACY = 0x1106,
 
 	/* CHROMIUM: success responses */
 	VIRTIO_GPU_RESP_OK_RESOURCE_PLANE_INFO = 0x11FF,
-	VIRTIO_GPU_RESP_OK_ALLOCATION_METADATA = 0x11FE,
 
 	/* error responses */
 	VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
@@ -128,30 +127,6 @@ enum virtio_gpu_ctrl_type {
 	VIRTIO_GPU_RESP_ERR_INVALID_MEMORY_ID,
 };
 
-enum virtio_gpu_memory_type {
-	VIRTIO_GPU_MEMORY_UNDEFINED = 0,
-
-	/*
-	 * Traditional virtio-gpu memory.
-	 * Has both host and guest side storage.
-	 *
-	 * VIRTIO_GPU_CMD_TRANSFER_* commands are used
-	 * to copy between guest and host storage.
-	 *
-	 * Created using VIRTIO_GPU_CMD_RESOURCE_CREATE_V2.
-	 */
-	VIRTIO_GPU_MEMORY_TRANSFER,
-	VIRTIO_GPU_MEMORY_SHARED_GUEST,
-	VIRTIO_GPU_MEMORY_HOST_COHERENT,
-};
-
-enum virtio_gpu_caching_type {
-	VIRTIO_GPU_UNDEFINED_CACHING = 0,
-	VIRTIO_GPU_CACHED,
-	VIRTIO_GPU_WRITE_COMBINE,
-	VIRTIO_GPU_UNCACHED,
-};
-
 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
 
 struct virtio_gpu_ctrl_hdr {
@@ -287,7 +262,6 @@ struct virtio_gpu_transfer_host_3d {
 struct virtio_gpu_resource_create_3d {
 	struct virtio_gpu_ctrl_hdr hdr;
 	__le32 resource_id;
-	/* memory_type is VIRTIO_GPU_MEMORY_TRANSFER */
 	__le32 target;
 	__le32 format;
 	__le32 bind;
@@ -328,47 +302,6 @@ struct virtio_gpu_cmd_submit {
 	__le32 padding;
 };
 
-/* VIRTIO_GPU_CMD_RESOURCE_CREATE_V2 */
-struct virtio_gpu_resource_create_v2 {
-	struct virtio_gpu_ctrl_hdr hdr;
-	__le32 resource_id;
-	__le32 guest_memory_type;
-	__le32 caching_type;
-	__le32 pad;
-	__le64 size;
-	__le64 pci_addr;
-	__le32 args_size;
-	__le32 nr_entries;
-	/* ('nr_entries' * struct virtio_gpu_mem_entry) + 'args_size'
-	 * bytes follow here.
-	 */
-};
-
-/* VIRTIO_GPU_CMD_RESOURCE_CREATE_V2_UNREF */
-struct virtio_gpu_resource_v2_unref {
-	struct virtio_gpu_ctrl_hdr hdr;
-	__le32 resource_id;
-	__le32 padding;
-};
-
-/* VIRTIO_GPU_CMD_RESOURCE_CREATE_V2 */
-struct virtio_gpu_allocation_metadata {
-	struct virtio_gpu_ctrl_hdr hdr;
-	__le32 request_id;
-	__le32 pad;
-	__le32 request_size;
-	__le32 response_size;
-	/* 'request_size' bytes go here */
-};
-
-/* VIRTIO_GPU_RESP_OK_ALLOCATION_METADATA */
-struct virtio_gpu_resp_allocation_metadata {
-	struct virtio_gpu_ctrl_hdr hdr;
-	__le32 request_id;
-	__le32 response_size;
-	/* 'response_size' bytes go here */
-};
-
 #define VIRTIO_GPU_CAPSET_VIRGL 1
 
 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
@@ -460,4 +393,59 @@ struct virtio_gpu_resp_resource_uuid {
 	__u8 uuid[16];
 };
 
+
+/* VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB */
+struct virtio_gpu_resource_create_blob {
+	struct virtio_gpu_ctrl_hdr hdr;
+	__le32 resource_id;
+#define VIRTIO_GPU_RES_BLOB_GUEST_MASK   0x000f
+#define VIRTIO_GPU_RES_BLOB_GUEST_NONE   0x0000
+#define VIRTIO_GPU_RES_BLOB_GUEST_SYSTEM 0x0001
+
+#define VIRTIO_GPU_RES_BLOB_HOST_MASK 0x00f0
+#define VIRTIO_GPU_RES_BLOB_HOST_NONE 0x0000
+#define VIRTIO_GPU_RES_BLOB_HOST      0x0010
+
+#define VIRTIO_GPU_RES_BLOB_USE_MASK         0x0f00
+#define VIRTIO_GPU_RES_BLOB_USE_NONE         0x0000
+#define VIRTIO_GPU_RES_BLOB_USE_MAPPABLE     0x0100
+#define VIRTIO_GPU_RES_BLOB_USE_SHAREABLE    0x0200
+#define VIRTIO_GPU_RES_BLOB_USE_CROSS_DEVICE 0x0400
+	__le32 flags;
+	__le64 size;
+	__le64 memory_id;
+	__le32 nr_entries;
+	__le32 padding;
+	/*
+	 * sizeof(nr_entries * virtio_gpu_mem_entry) bytes follow
+	 */
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_MAP */
+struct virtio_gpu_resource_map {
+	struct virtio_gpu_ctrl_hdr hdr;
+	__le32 resource_id;
+	__le32 padding;
+	__le64 offset;
+};
+
+/* VIRTIO_GPU_RESP_OK_MAP_INFO */
+#define VIRTIO_GPU_MAP_CACHE_MASK      0x0f
+#define VIRTIO_GPU_MAP_CACHE_NONE      0x00
+#define VIRTIO_GPU_MAP_CACHE_CACHED    0x01
+#define VIRTIO_GPU_MAP_CACHE_UNCACHED  0x02
+#define VIRTIO_GPU_MAP_CACHE_WC        0x03
+struct virtio_gpu_resp_map_info {
+	struct virtio_gpu_ctrl_hdr hdr;
+	__u32 map_flags;
+	__u32 padding;
+};
+
+/* VIRTIO_GPU_CMD_RESOURCE_UNMAP */
+struct virtio_gpu_resource_unmap {
+	struct virtio_gpu_ctrl_hdr hdr;
+	__le32 resource_id;
+	__le32 padding;
+};
+
 #endif