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authorVivek Gautam <gautam.vivek@samsung.com>2013-04-10 19:37:52 +0900
committerTushar Behera <tushar.behera@linaro.org>2013-06-19 16:53:32 +0530
commit3f3f5003dcda1cd07ee7bd2abf01a57f2e584639 (patch)
treede4e685f9a7c59d4b501527ff63abb4e4b3c268d
parentd28adaea88da59bef3c887e24b5c6bc881fd93ee (diff)
ARM: dts: Add device tree bindings for dwc3-exynos
Document device tree binding information as required by the Samsung' USB 3.0 controller. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--Documentation/devicetree/bindings/usb/exynos-usb.txt34
1 files changed, 34 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/exynos-usb.txt b/Documentation/devicetree/bindings/usb/exynos-usb.txt
index b3abde73601..d967ba16de6 100644
--- a/Documentation/devicetree/bindings/usb/exynos-usb.txt
+++ b/Documentation/devicetree/bindings/usb/exynos-usb.txt
@@ -48,3 +48,37 @@ Example:
clocks = <&clock 285>;
clock-names = "usbhost";
};
+
+DWC3
+Required properties:
+ - compatible: should be "samsung,exynos5250-dwusb3" for USB 3.0 DWC3
+ controller.
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+ with 'reg' property.
+ - ranges: allows valid 1:1 translation between child's address space and
+ parent's address space
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Exynos dwc3 glue.
+- dwc3 :
+ The binding details of dwc3 can be found in:
+ Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+ usb@12000000 {
+ compatible = "samsung,exynos5250-dwusb3";
+ clocks = <&clock 286>;
+ clock-names = "usbdrd30";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dwc3 {
+ compatible = "synopsys,dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <0 72 0>;
+ usb-phy = <&usb2_phy &usb3_phy>;
+ };
+ };