From 10f8a3974ad52fe6790dd7945eebd1cb3741bd97 Mon Sep 17 00:00:00 2001 From: Amit Nagal Date: Wed, 27 Sep 2023 15:13:42 +0530 Subject: refactor(zynqmp): use common code for prepare_dtb use common code definition and remove zynqmp local definition for prepare_dtb in dtb flows. Change-Id: I362b90b96852e9afccc8a2e23d3b7f709280fba7 Signed-off-by: Amit Nagal --- plat/xilinx/zynqmp/bl31_zynqmp_setup.c | 47 +--------------------------------- plat/xilinx/zynqmp/platform.mk | 1 + 2 files changed, 2 insertions(+), 46 deletions(-) (limited to 'plat') diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index 7bdaf189b..32bb9820d 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -21,6 +21,7 @@ #include #include +#include #include #include #include @@ -183,55 +184,9 @@ static uint64_t rdo_el3_interrupt_handler(uint32_t id, uint32_t flags, } #endif -#if (defined(XILINX_OF_BOARD_DTB_ADDR) && !IS_TFA_IN_OCM(BL31_BASE)) -static void prepare_dtb(void) -{ - void *dtb = (void *)XILINX_OF_BOARD_DTB_ADDR; - int ret; - - /* Return if no device tree is detected */ - if (fdt_check_header(dtb) != 0) { - NOTICE("Can't read DT at %p\n", dtb); - return; - } - - ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE); - if (ret < 0) { - ERROR("Invalid Device Tree at %p: error %d\n", dtb, ret); - return; - } - - if (dt_add_psci_node(dtb)) { - ERROR("Failed to add PSCI Device Tree node\n"); - return; - } - - if (dt_add_psci_cpu_enable_methods(dtb)) { - ERROR("Failed to add PSCI cpu enable methods in Device Tree\n"); - return; - } - - /* Reserve memory used by Trusted Firmware. */ - if (fdt_add_reserved_memory(dtb, "tf-a", BL31_BASE, - (size_t) (BL31_LIMIT - BL31_BASE))) { - WARN("Failed to add reserved memory nodes for BL31 to DT.\n"); - } - - ret = fdt_pack(dtb); - if (ret < 0) { - ERROR("Failed to pack Device Tree at %p: error %d\n", dtb, ret); - } - - clean_dcache_range((uintptr_t)dtb, fdt_blob_size(dtb)); - INFO("Changed device tree to advertise PSCI and reserved memories.\n"); -} -#endif - void bl31_platform_setup(void) { -#if (defined(XILINX_OF_BOARD_DTB_ADDR) && !IS_TFA_IN_OCM(BL31_BASE)) prepare_dtb(); -#endif /* Initialize the gic cpu and distributor interfaces */ plat_arm_gic_driver_init(); diff --git a/plat/xilinx/zynqmp/platform.mk b/plat/xilinx/zynqmp/platform.mk index 9c79855f1..e20cb2246 100644 --- a/plat/xilinx/zynqmp/platform.mk +++ b/plat/xilinx/zynqmp/platform.mk @@ -127,6 +127,7 @@ BL31_SOURCES += drivers/arm/cci/cci.c \ ${LIBFDT_SRCS} \ plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ plat/xilinx/common/plat_startup.c \ + plat/xilinx/common/plat_fdt.c \ plat/xilinx/zynqmp/bl31_zynqmp_setup.c \ plat/xilinx/zynqmp/plat_psci.c \ plat/xilinx/zynqmp/plat_zynqmp.c \ -- cgit v1.2.3