summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2023-10-27Merge "feat(cpus): add support for Travis CPU" into integrationMadhukar Pappireddy
2023-10-27Merge "fix(ti): align static device region addresses to reduce MMU table ↵Madhukar Pappireddy
count" into integration
2023-10-27Merge "feat(handoff): port BL31-BL33 interface to fw handoff framework" into ↵Manish Pandey
integration
2023-10-27feat(handoff): port BL31-BL33 interface to fw handoff frameworkHarrison Mutai
The firmware handoff framework is a light weight mechanism for sharing information between bootloader stages. Add support for this framework at the handoff boundary between runtime firmware BL31 and NS software on FVP. Change-Id: Ib02e0e4c20a39e32e06da667caf2ce5a28de1e28 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-26Merge changes from topic "sm/err_errata" into integrationLauren Wehrmeister
* changes: fix(cpus): fix the rev-var of Neoverse-V1 fix(errata-abi): update the Neoverse-N2 errata ABI struct fix(errata-abi): update the neoverse-N1 errata ABI struct fix(cpus): fix the rev-var of Cortex-X2 fix(errata-abi): update the Cortex-A78C errata ABI struct fix(cpus): update the rev-var for Cortex-A78AE fix(errata-abi): update the Cortex-A76 errata ABI struct fix(cpus): fix the rev-var for Cortex-A710
2023-10-26feat(cpus): add support for Travis CPUJuan Pablo Conde
Adding basic CPU library code to support Travis CPU Change-Id: I3c85e9fab409325d213978888a8f6d6949291258 Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
2023-10-26Merge "fix(arm): fix GIC macros for GICv4.1 support" into integrationManish Pandey
2023-10-26Merge "fix(spmd): fix FFA_VERSION forwarding" into integrationManish Pandey
2023-10-25fix(ti): align static device region addresses to reduce MMU table countAndrew Davis
Align our device memory regions to the next highest MMU table level (LV2). This allows the xlat_tables library code to use a single entry in the higher order table, vs having to create a new table for LV3 entries. This reduces our tables to just 4: 2 LV2 and 1 LV3 plus 1 spare in case alignment changes ever cause one to be split. This saves 24KB of our 128KB total TF-A SRAM (~18%!). While here, as USE_COHERENT_MEM does not change MAX_XLAT_TABLES but does change our total MAX_MMAP_REGIONS, move that check accordingly. Signed-off-by: Andrew Davis <afd@ti.com> Change-Id: I4cb8e3b2cc3d05c6c9a84d887dd6ec56bde7a786
2023-10-25Merge "fix(mpam): refine MPAM initialization and enablement process" into ↵Manish Pandey
integration
2023-10-25fix(arm): fix GIC macros for GICv4.1 supportMoritz Fischer
Newer platforms such as Neoverse V2 with GICv4.1 will report 0x3 instead of 0x1 in ID_AA64PFR0_EL1. Update the logic to not accidentially take the GICv2 path when printing the GIC registers. Change-Id: Ia0d546cc5dcaa0dcad49a75b5921b0df5e176d34 Signed-off-by: Moritz Fischer <moritzf@google.com>
2023-10-25Merge "fix(build): convert tabs to spaces" into integrationManish Pandey
2023-10-25fix(mpam): refine MPAM initialization and enablement processArvind Ram Prakash
Restricts MPAM to only NS world and enables trap to EL3 for access of MPAM registers from lower ELs of Secure and Realm world. This patch removes MPAM enablement from global context and adds it to EL3 State context which enables/disables MPAM during world switches. Renamed ENABLE_MPAM_FOR_LOWER_ELS to ENABLE_FEAT_MPAM and removed mpam_init_el3() as RESET behaviour is trapping. Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I131f9dba5df236a71959b2d425ee11af7f3c38c4
2023-10-25fix(spmd): fix FFA_VERSION forwardingOlivier Deprez
When FFA_VERSION is forwarded from SPMD to SPMC, ensure that the full NS GP regs context incl. x8-x17 is carried when building the SPMD to SPMC direct message. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I3467c0e04de95ab80f7c86a0763021a5fa961e4d
2023-10-25Merge "feat(mt8195): increase TZRAM" into integrationOlivier Deprez
2023-10-25Merge "feat(st): update STM32MP DT files" into integrationManish Pandey
2023-10-25Merge changes from topic "st_remove_shm" into integrationManish Pandey
* changes: docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated feat(stm32mp15): disable OP-TEE shared memory
2023-10-25Merge "fix(st): properly check LOADADDR" into integrationManish Pandey
2023-10-25Merge "fix(cpus): workaround for Cortex-A510 erratum 2080326" into integrationManish Pandey
2023-10-24fix(cpus): workaround for Cortex-A510 erratum 2080326Sona Mathew
Cortex-A510 erratum 2080326 is a Cat B erratum that applies to all revisions <= r0p2 and is fixed in r0p3. The workaround sequence helps perform a DSB after each TLBI instruction and can be applied only for version r0p2 and has minimal performance impact. The workaround is not applicable for versions < r0p2. SDEN documentation: https://developer.arm.com/documentation/SDEN1873361/latest Change-Id: Ib9bce8b711c25a79f7b2f891ae6f8b366fc80ddd Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(cpus): fix the rev-var of Neoverse-V1Sona Mathew
Update the revision and variant information in the errata ABI file, neoverse_v1.S file for erratum ID - 2294912 to match the revision and variant in the latest SDEN. SDEN documentation: https://developer.arm.com/documentation/SDEN-1401781/latest Change-Id: I38a0f53c3515860ba442b5c0872c8ab051fdda6f Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(errata-abi): update the Neoverse-N2 errata ABI structSona Mathew
Updated the structure for Neoverse_N2 in the errata ABI file for the missing entries from the neoverse_n2.S file. Change-Id: I635c39014a7b3e842a978a59e122d508d4bcf3c1 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(errata-abi): update the neoverse-N1 errata ABI structSona Mathew
Updated the structure for Neoverse_N1 in the errata ABI file for the missing entries from the neoverse_n1.S file. Change-Id: I79a1a72b807781d65a6afc9e0367e77b21eecf41 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(cpus): fix the rev-var of Cortex-X2Sona Mathew
Update the revision and variant information in the errata ABI file, cortex_X2.S file for erratum ID - 2058056 to match the revision and variant in the latest SDEN. SDEN documentation: https://developer.arm.com/documentation/SDEN-1775100/latest Change-Id: I28ee39949d977c53d6f5243100f0c29bc3c0428c Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(errata-abi): update the Cortex-A78C errata ABI structSona Mathew
Updated the structure for Cortex-A78C in the errata ABI file for missing entries from the cortex_a78c.S file. Change-Id: I3d994337221de03264be235f1727de7494ed4312 Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(cpus): update the rev-var for Cortex-A78AESona Mathew
Update the revision and variant information in the cortex_a78_ae.s and errata ABI file for erratum ID - 2376748 based on the latest SDEN. SDEN documentation: https://developer.arm.com/documentation/SDEN-1707912/latest Change-Id: I082aac41adf717b0d5d59046a8933a3f5a3de94f Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(errata-abi): update the Cortex-A76 errata ABI structSona Mathew
Updated the structure for Cortex-A76 in the errata ABI file for the missing entries from the cortex_a76.S file. Change-Id: Iceaf26fb2de493a877c4c100c0137f9255fc8b9f Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24fix(cpus): fix the rev-var for Cortex-A710Sona Mathew
Update the revision and variant information in the errata ABI file, cortex_A710.S file for erratum ID - 2058056 and erratum ID - 2055002 to match the revision and variant in the latest SDEN. SDEN documentation: https://developer.arm.com/documentation/SDEN-1775101/latest Change-Id: Ie010dae90dabf8670f588a06f9a606cf41e22afa Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
2023-10-24Merge changes Ia66dd232,Ie0ddbe0b,Idd191614 into integrationSandrine Bailleux
* changes: fix(rcar3-drivers): update DDR setting fix(rcar3): fix CPG register code comment fix(rcar3): update Draak and Eagle board IDs
2023-10-23Merge changes from topic "gcc_linker_aarch32" into integrationManish Pandey
* changes: feat(st): support gcc as linker fix(build): allow gcc linker on Aarch32 platforms
2023-10-23Merge "fix(cert-create): fix key loading logic" into integrationSandrine Bailleux
2023-10-23fix(build): convert tabs to spacesGovindraj Raja
Convert any used tabs in arch_features.mk to spaces to avoid makefile build issues. Only recipes should be indented with tabs. ENABLE_TRBE_FOR_NS should be enabled only for aarch64 but accidentally its enabled for aarch32 as well in FVP makefile. Change-Id: Iee913a04d6b60a4738183a17421754c2638e8e6d Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2023-10-23fix(st): properly check LOADADDRYann Gautier
LOADADDR variable is retrieved from line starting with RAM in map file. But if the build path contains RAM, this keywords will appear several times and the grep will fail. Correct that by really checking the line starting with RAM thanks to grep '^RAM'. Change-Id: I2ce23edb5255028b1a56ba45c16569a42ae21ae2 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/328648
2023-10-20Merge changes from topic "mp/test_espi" into integrationOlivier Deprez
* changes: feat(fvp): new SiP call to set an interrupt pending refactor(arm): allow platform specific SiP support
2023-10-20Merge "fix(build): pass parameters through response files" into integrationManish Pandey
2023-10-20Merge "docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainers" ↵Manish Pandey
into integration
2023-10-19feat(fvp): new SiP call to set an interrupt pendingMadhukar Pappireddy
This patch introduces an SiP SMC call for FVP platform to set an interrupt pending. This is needed for testing purposes. Change-Id: I3dc68ffbec36d90207c30571dc1fa7ebfb75046e Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2023-10-19refactor(arm): allow platform specific SiP supportMadhukar Pappireddy
This patch introduces handler to add support for SiP calls to be handled at EL3 for Arm platforms. Consequently, the support for SPMD LSP is moved to corresponding Arm platform SiP source file. This will allow us to add support for a new SiP call in subsequent patch. Change-Id: Ie29cb57fc622f96be3b67bebf34ce37cc82947d8 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2023-10-19docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecatedYann Gautier
TF-A is no more in charge of configuring OP-TEE shared memory. Set the STM32MP15_OPTEE_RSV_SHM flag as deprecated (as well as the code depending on it). Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I863d9a1e45e0bfc2f45d9bd84b90d626738934ab
2023-10-19feat(stm32mp15): disable OP-TEE shared memoryYann Gautier
OP-TEE manages its own memory, and can open some areas through TZC400. There is no need to configure this shared memory in TF-A. Just assure that CFG_CORE_RESERVED_SHM=n for OP-TEE compilation. Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ib54acd60d9ec243d6ef9cc6b74937b4183d9ffa5
2023-10-19fix(build): pass parameters through response filesHarrison Mutai
CMD.exe limits prompts to 8191 characters [1], unfortunately our command line lengths when building with make get really long and in certain instances exceed this limit. Get around this by passing options to the compiler and linker via the response file mechanism. [1] https://learn.microsoft.com/en-us/troubleshoot/windows-client/shell-experience/command-line-string-limitation Change-Id: I6fee83c5892542f887daf25227fcb595a36f26b9 Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-10-19fix(cert-create): fix key loading logicSandrine Bailleux
When key_load() attempts to load the key from a file and it fails to open this file, the 'err_code' output argument is set to 'KEY_ERR_OPEN' error code. However, it is incorrectly overwritten later on with 'KEY_ERR_NONE' or 'KEY_ERR_LOAD'. The latter case messes up with the key creation scenario. The 'KEY_ERR_LOAD' error leads the tool to exit, when it should attempt to create the said key file if invoked with the --new-keys/-n option. Note that, to complicate matters further, which of 'KEY_ERR_OPEN' or 'KEY_ERR_NONE' values is returned by key_load() depends on the version of OpenSSL in use: - If using v3+, KEY_ERROR_LOAD is returned. - If using <v3, KEY_ERROR_NONE is returned as a result of the key pair container being initialized by key_new(). This patch fixes this bug and also takes the opportunity to refactor key_load() implementation to (hopefully) make it more straight-forward and easier to reason about. Fixes: 616b3ce27d9a "feat(cert-create): add pkcs11 engine support" Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Reported-by: Wenchen Tan <xtaens@qq.com> Change-Id: Ia78ff442e04c5ff98e6ced8d26becbd817a8ccb7
2023-10-19Merge "docs: add code-owners for Firmare Handoff Library" into integrationManish Pandey
2023-10-19feat(st): update STM32MP DT filesYann Gautier
This is an alignment with Linux DT files that have been merged in stm32 tree [1], and will be in Linux 6.7. The /omit-if-no-ref/ in overlay files are now removed, as already in pinctrl files. [1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415
2023-10-18docs: add code-owners for Firmare Handoff LibraryManish Pandey
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I2c64e7582a744f54b54085d3a1d7ac91e269ce3d
2023-10-18docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainersSandrine Bailleux
On behalf of Jorge himself. Change-Id: I2dca445a240f7bc16c02365e936b064f6a246d89 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2023-10-17Merge changes from topic "xlnx_dtb_console" into integrationJoanna Farley
* changes: feat(versal-net): retrieval of console information from dtb feat(versal): retrieval of console information from dtb refactor(xilinx): create generic function for clock retrieval feat(zynqmp): retrieval of console information from dtb
2023-10-17Merge "feat(mt8188): add EMI MPU support for SCP and DSP" into integrationOlivier Deprez
2023-10-17Merge changes from topic "dcc-console" into integrationJoanna Farley
* changes: fix(dcc): enable DCC also for crash console build(changelog): add new scope for DCC
2023-10-16fix(rcar3-drivers): update DDR settingYoshifumi Hosoya
Update R-Car H3/M3/M3N DDR setting rev.0.42. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: Ia66dd2329ab3a3ca39132a737e92b3a4864db02d
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-23 13:31:40 +0000