diff options
7 files changed, 40 insertions, 25 deletions
diff --git a/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c b/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c index 8d002deca..3f6a9484d 100644 --- a/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c +++ b/drivers/renesas/common/ddr/ddr_b/boot_init_dram.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2021, Renesas Electronics Corporation. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -1180,6 +1180,11 @@ static void regif_pll_wa(void) ddrtbl_getval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_LP4_BOOT_TOP_PLL_CTRL )); + if (ddrtbl_getval(_cnf_DDR_PHY_ADR_G_REGSET, _reg_PHY_LP4_BOOT_LOW_FREQ_SEL)) { + reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_LP4_BOOT_LOW_FREQ_SEL), + _cnf_DDR_PHY_ADR_G_REGSET[0x7f & ddr_regdef_adr( + _reg_PHY_LP4_BOOT_LOW_FREQ_SEL)]); + } } reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_LPDDR3_CS), @@ -2856,6 +2861,16 @@ static uint32_t pll3_freq(uint32_t on) timeout = wait_freqchgreq(1); + if ((!((prr_product == PRR_PRODUCT_H3) && (prr_cut <= PRR_PRODUCT_11))) && (on)) { + if (((1600U * ddr_mbpsdiv) < ddr_mbps) || (prr_product == PRR_PRODUCT_M3)) { + reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x01421142U); + reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL_CA), 0x00000142U); + } else { + reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL), 0x03421342U); + reg_ddrphy_write_a(ddr_regdef_adr(_reg_PHY_PLL_CTRL_CA), 0x00000342U); + } + } + if (timeout) { return 1; } diff --git a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h index 3cb19752c..328adbfe4 100644 --- a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h +++ b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2015-2021, Renesas Electronics Corporation. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#define RCAR_DDR_VERSION "rev.0.41" +#define RCAR_DDR_VERSION "rev.0.42" #define DRAM_CH_CNT 0x04 #define SLICE_CNT 0x04 #define CS_CNT 0x02 diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h index e5258af6c..5a662ec31 100644 --- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h +++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_h3ver2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, Renesas Electronics Corporation. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -230,8 +230,8 @@ static const uint32_t /*0693*/ 0x00000000, /*0694*/ 0x00000000, /*0695*/ 0x00005064, - /*0696*/ 0x01421142, - /*0697*/ 0x00000142, + /*0696*/ 0x05421542, + /*0697*/ 0x00000542, /*0698*/ 0x00000000, /*0699*/ 0x000f1100, /*069a*/ 0x0f110f11, @@ -240,12 +240,12 @@ static const uint32_t /*069d*/ 0x0002c000, /*069e*/ 0x02c002c0, /*069f*/ 0x000002c0, - /*06a0*/ 0x03421342, - /*06a1*/ 0x00000342, + /*06a0*/ 0x05421542, + /*06a1*/ 0x00000542, /*06a2*/ 0x00000000, /*06a3*/ 0x00000000, /*06a4*/ 0x05020000, - /*06a5*/ 0x14000000, + /*06a5*/ 0x14000001, /*06a6*/ 0x027f6e00, /*06a7*/ 0x047f027f, /*06a8*/ 0x00027f6e, diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h index b491f0e91..482a2a5ce 100644 --- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h +++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, Renesas Electronics Corporation. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -210,8 +210,8 @@ static const uint32_t DDR_PHY_ADR_G_REGSET_M3[DDR_PHY_ADR_G_REGSET_NUM_M3] = { /*0b8b*/ 0x01010100, /*0b8c*/ 0x00000600, /*0b8d*/ 0x50640000, - /*0b8e*/ 0x01421142, - /*0b8f*/ 0x00000142, + /*0b8e*/ 0x03421342, + /*0b8f*/ 0x00000342, /*0b90*/ 0x00000000, /*0b91*/ 0x000f1600, /*0b92*/ 0x0f160f16, diff --git a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h index fb3032dee..436c1a0bb 100644 --- a/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h +++ b/drivers/renesas/common/ddr/ddr_b/init_dram_tbl_m3n.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2020, Renesas Electronics Corporation. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -230,8 +230,8 @@ static const uint32_t DDR_PHY_ADR_G_REGSET_M3N[DDR_PHY_ADR_G_REGSET_NUM_M3N] = { /*0b93*/ 0x00000000, /*0b94*/ 0x00000000, /*0b95*/ 0x00005064, - /*0b96*/ 0x01421142, - /*0b97*/ 0x00000142, + /*0b96*/ 0x05421542, + /*0b97*/ 0x00000542, /*0b98*/ 0x00000000, /*0b99*/ 0x000f1600, /*0b9a*/ 0x0f160f16, @@ -241,12 +241,12 @@ static const uint32_t DDR_PHY_ADR_G_REGSET_M3N[DDR_PHY_ADR_G_REGSET_NUM_M3N] = { /*0b9e*/ 0x02c002c0, /*0b9f*/ 0x000002c0, /*0ba0*/ 0x08040201, - /*0ba1*/ 0x03421342, - /*0ba2*/ 0x00000342, + /*0ba1*/ 0x05421542, + /*0ba2*/ 0x00000542, /*0ba3*/ 0x00000000, /*0ba4*/ 0x00000000, /*0ba5*/ 0x05030000, - /*0ba6*/ 0x00010700, + /*0ba6*/ 0x00010701, /*0ba7*/ 0x00000014, /*0ba8*/ 0x00027f6e, /*0ba9*/ 0x047f027f, diff --git a/drivers/renesas/rcar/board/board.h b/drivers/renesas/rcar/board/board.h index 51a8e306f..23469114f 100644 --- a/drivers/renesas/rcar/board/board.h +++ b/drivers/renesas/rcar/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, Renesas Electronics Corporation. All rights + * Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights * reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -11,13 +11,13 @@ #define BOARD_SALVATOR_X (0x00) #define BOARD_KRIEK (0x01) #define BOARD_STARTER_KIT (0x02) +#define BOARD_EAGLE (0x03) #define BOARD_SALVATOR_XS (0x04) +#define BOARD_DRAAK (0x07) #define BOARD_EBISU (0x08) #define BOARD_STARTER_KIT_PRE (0x0B) -#define BOARD_EBISU_4D (0x0DU) -#define BOARD_DRAAK (0x0EU) -#define BOARD_EAGLE (0x0FU) -#define BOARD_UNKNOWN (BOARD_EAGLE + 1U) +#define BOARD_EBISU_4D (0x0D) +#define BOARD_UNKNOWN (BOARD_EBISU_4D + 1U) #define BOARD_REV_UNKNOWN (0xFF) diff --git a/plat/renesas/common/include/registers/cpg_registers.h b/plat/renesas/common/include/registers/cpg_registers.h index 5d2bb9e3a..277f11b77 100644 --- a/plat/renesas/common/include/registers/cpg_registers.h +++ b/plat/renesas/common/include/registers/cpg_registers.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2021, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2015-2023, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -16,7 +16,7 @@ #define CPG_SRCR2 (CPG_BASE + 0x00B0U) /* CPG module stop status 2 */ #define CPG_MSTPSR2 (CPG_BASE + 0x0040U) -/* CPG module stop status 2 */ +/* CPG module stop status 3 */ #define CPG_MSTPSR3 (CPG_BASE + 0x0048U) /* CPG write protect */ #define CPG_CPGWPR (CPG_BASE + 0x0900U) |