diff options
| -rw-r--r-- | bl31/bl31_main.c | 9 | ||||
| -rw-r--r-- | include/lib/el3_runtime/aarch64/context.h | 4 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context.S | 17 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 18 |
4 files changed, 9 insertions, 39 deletions
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c index a4640b1b9..e70eb5584 100644 --- a/bl31/bl31_main.c +++ b/bl31/bl31_main.c @@ -93,15 +93,6 @@ void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2, /* Perform late platform-specific setup */ bl31_plat_arch_setup(); -#if ENABLE_FEAT_HCX - /* - * Assert that FEAT_HCX is supported on this system, without this check - * an exception would occur during context save/restore if enabled but - * not supported. - */ - assert(is_feat_hcx_supported()); -#endif /* ENABLE_FEAT_HCX */ - #if CTX_INCLUDE_PAUTH_REGS /* * Assert that the ARMv8.3-PAuth registers are present or an access diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 27cf3b947..6986e0e51 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -547,10 +547,6 @@ void el2_sysregs_context_restore_trf(el2_sysregs_t *regs); void el2_sysregs_context_save_csv2(el2_sysregs_t *regs); void el2_sysregs_context_restore_csv2(el2_sysregs_t *regs); #endif /* ENABLE_FEAT_CSV2_2 */ -#if ENABLE_FEAT_HCX -void el2_sysregs_context_save_hcx(el2_sysregs_t *regs); -void el2_sysregs_context_restore_hcx(el2_sysregs_t *regs); -#endif /* ENABLE_FEAT_HCX */ #endif /* CTX_INCLUDE_EL2_REGS */ #if CTX_INCLUDE_FPREGS diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S index e0efec2c9..a20584cc7 100644 --- a/lib/el3_runtime/aarch64/context.S +++ b/lib/el3_runtime/aarch64/context.S @@ -49,10 +49,6 @@ .global el2_sysregs_context_save_csv2 .global el2_sysregs_context_restore_csv2 #endif /* ENABLE_FEAT_CSV2_2 */ -#if ENABLE_FEAT_HCX - .global el2_sysregs_context_save_hcx - .global el2_sysregs_context_restore_hcx -#endif /* ENABLE_FEAT_HCX */ #endif /* CTX_INCLUDE_EL2_REGS */ .global el1_sysregs_context_save @@ -432,19 +428,6 @@ func el2_sysregs_context_restore_csv2 endfunc el2_sysregs_context_restore_csv2 #endif /* ENABLE_FEAT_CSV2_2 */ -#if ENABLE_FEAT_HCX -func el2_sysregs_context_save_hcx - mrs x14, hcrx_el2 - str x14, [x0, #CTX_HCRX_EL2] - ret -endfunc el2_sysregs_context_save_hcx - -func el2_sysregs_context_restore_hcx - ldr x14, [x0, #CTX_HCRX_EL2] - msr hcrx_el2, x14 - ret -endfunc el2_sysregs_context_restore_hcx -#endif /* ENABLE_FEAT_HCX */ #endif /* CTX_INCLUDE_EL2_REGS */ /* ------------------------------------------------------------------ diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 46e191cc0..3bcefdb5d 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -320,9 +320,9 @@ static void setup_context_common(cpu_context_t *ctx, const entry_point_info_t *e * If FEAT_HCX is enabled, enable access to HCRX_EL2 by setting * SCR_EL3.HXEn. */ -#if ENABLE_FEAT_HCX - scr_el3 |= SCR_HXEn_BIT; -#endif + if (is_feat_hcx_supported()) { + scr_el3 |= SCR_HXEn_BIT; + } /* * If FEAT_RNG_TRAP is enabled, all reads of the RNDR and RNDRRS @@ -873,9 +873,9 @@ void cm_el2_sysregs_context_save(uint32_t security_state) #if ENABLE_FEAT_CSV2_2 el2_sysregs_context_save_csv2(el2_sysregs_ctx); #endif -#if ENABLE_FEAT_HCX - el2_sysregs_context_save_hcx(el2_sysregs_ctx); -#endif + if (is_feat_hcx_supported()) { + write_ctx_reg(el2_sysregs_ctx, CTX_HCRX_EL2, read_hcrx_el2()); + } } } @@ -931,9 +931,9 @@ void cm_el2_sysregs_context_restore(uint32_t security_state) #if ENABLE_FEAT_CSV2_2 el2_sysregs_context_restore_csv2(el2_sysregs_ctx); #endif -#if ENABLE_FEAT_HCX - el2_sysregs_context_restore_hcx(el2_sysregs_ctx); -#endif + if (is_feat_hcx_supported()) { + write_hcrx_el2(read_ctx_reg(el2_sysregs_ctx, CTX_HCRX_EL2)); + } } } #endif /* CTX_INCLUDE_EL2_REGS */ |