diff options
| author | Marco Felsch <m.felsch@pengutronix.de> | 2023-09-06 15:57:30 +0200 |
|---|---|---|
| committer | Marco Felsch <m.felsch@pengutronix.de> | 2023-10-05 16:02:10 +0200 |
| commit | 85625646692597ba8a1829efaadf56163450efaf (patch) | |
| tree | b9056d5d458888b828315158a869490889ebdc32 /plat | |
| parent | 8d150c9524b1459b61c9d881100e20da827c1bd0 (diff) | |
feat(imx8mn): add workaround for errata ERR050362
Port the workaround from the downstream imx-atf [1]:
| commit 1990081264f40822d1564f4562f05bbbc0c2941b
| Author: Ji Luo <ji.luo@nxp.com>
| Date: Thu May 20 16:26:55 2021 +0800
|
| MA-19071 imx8mn: workaround for errata ERR050362
|
| Configure the force_incr programmable bit in GPV_5 of PL301_display,
| which fixes partial write issue. This workaround was done in MCU FW
| before, move it to TF-A now as MCU should not touch secure world.
|
| Change-Id: I2e5bbc764640afeab6ac2f4b202939b59bd3b3f2
| Signed-off-by: Ji Luo <ji.luo@nxp.com>
[1] https://github.com/nxp-imx/imx-atf.git
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Change-Id: Iaff5f1faa143204d64c075b288f8dd13eb2902d8
Diffstat (limited to 'plat')
| -rw-r--r-- | plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c | 7 | ||||
| -rw-r--r-- | plat/imx/imx8m/imx8mn/include/platform_def.h | 4 |
2 files changed, 11 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c index 9117cf0ea..2308dfc95 100644 --- a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c +++ b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c @@ -139,6 +139,13 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, imx_csu_init(csu_cfg); + /* + * Configure the force_incr programmable bit in GPV_5 of PL301_display, which fixes + * partial write issue. The AXI2AHB bridge is used for masters that access the TCM + * through system bus. Please refer to errata ERR050362 for more information. + */ + mmio_setbits_32((GPV5_BASE_ADDR + FORCE_INCR_OFFSET), FORCE_INCR_BIT_MASK); + /* config the ocram memory range for secure access */ mmio_write_32(IMX_IOMUX_GPR_BASE + 0x2c, 0x4c1); val = mmio_read_32(IMX_IOMUX_GPR_BASE + 0x2c); diff --git a/plat/imx/imx8m/imx8mn/include/platform_def.h b/plat/imx/imx8m/imx8mn/include/platform_def.h index c75e25052..d5176dd17 100644 --- a/plat/imx/imx8m/imx8mn/include/platform_def.h +++ b/plat/imx/imx8m/imx8mn/include/platform_def.h @@ -141,6 +141,10 @@ #define COUNTER_FREQUENCY 8000000 /* 8MHz */ +#define GPV5_BASE_ADDR U(0x32500000) +#define FORCE_INCR_OFFSET U(0x4044) +#define FORCE_INCR_BIT_MASK U(0x2) + #define IMX_WDOG_B_RESET #define GIC_MAP MAP_REGION_FLAT(IMX_GIC_BASE, IMX_GIC_SIZE, MT_DEVICE | MT_RW) |