summaryrefslogtreecommitdiff
path: root/plat/arm/board
diff options
context:
space:
mode:
authorHarrison Mutai <harrison.mutai@arm.com>2023-09-29 11:05:32 +0100
committerHarrison Mutai <harrison.mutai@arm.com>2023-10-30 10:36:39 +0000
commit568d406ce7ad8cb5054bc5ae6a9b8d443d6e088f (patch)
treebec2ae12b6752a68f56cacbe1ac7664649ed2148 /plat/arm/board
parented5672070d5f9a5b1bdd9e71a1d7051ad5b7a901 (diff)
refactor(fvp): move image handling into generic procedure
Post image handling of the HW_CONFIG is out-of-scope for `plat_get_next_bl_params`. Move parts of the code responsible for post processing of loaded images into `bl2_plat_handle_post_image_load` for code reusability and maintainability. Change-Id: I476b3d306ebcd4529f5e542ba1063e144920bb5f Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Diffstat (limited to 'plat/arm/board')
-rw-r--r--plat/arm/board/fvp/fvp_bl2_setup.c97
1 files changed, 55 insertions, 42 deletions
diff --git a/plat/arm/board/fvp/fvp_bl2_setup.c b/plat/arm/board/fvp/fvp_bl2_setup.c
index 73035eac5..ebd52664b 100644
--- a/plat/arm/board/fvp/fvp_bl2_setup.c
+++ b/plat/arm/board/fvp/fvp_bl2_setup.c
@@ -19,6 +19,8 @@
#include "fvp_private.h"
+static struct transfer_list_header *ns_tl __unused;
+
void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3)
{
arm_bl2_early_platform_setup((uintptr_t)arg0, (meminfo_t *)arg1);
@@ -31,6 +33,10 @@ void bl2_platform_setup(void)
{
arm_bl2_platform_setup();
+#if TRANSFER_LIST
+ ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE);
+ assert(ns_tl != NULL);
+#endif
/* Initialize System level generic or SP804 timer */
fvp_timer_init();
}
@@ -42,16 +48,14 @@ struct bl_params *plat_get_next_bl_params(void)
{
struct bl_params *arm_bl_params;
const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
- bl_mem_params_node_t *param_node __unused;
- static struct transfer_list_header *ns_tl __unused;
struct transfer_list_entry *te __unused;
+ bl_mem_params_node_t *param_node __unused;
arm_bl_params = arm_get_next_bl_params();
#if !RESET_TO_BL2 && !EL3_PAYLOAD_BASE
const struct dyn_cfg_dtb_info_t *fw_config_info;
uintptr_t fw_config_base = 0UL;
- entry_point_info_t *ep_info;
#if __aarch64__
/* Get BL31 image node */
@@ -62,59 +66,35 @@ struct bl_params *plat_get_next_bl_params(void)
#endif /* __aarch64__ */
assert(param_node != NULL);
- /* get fw_config load address */
+ /* Update the next image's ep info with the FW config address */
fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
assert(fw_config_info != NULL);
fw_config_base = fw_config_info->config_addr;
assert(fw_config_base != 0UL);
- /*
- * Get the entry point info of next executable image and override
- * arg1 of entry point info with fw_config base address
- */
- ep_info = &param_node->ep_info;
- ep_info->args.arg1 = (uint32_t)fw_config_base;
+ param_node->ep_info.args.arg1 = (uint32_t)fw_config_base;
- /* grab NS HW config address */
- hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
- assert(hw_config_info != NULL);
-
- /* To retrieve actual size of the HW_CONFIG */
- param_node = get_bl_mem_params_node(HW_CONFIG_ID);
+ /* Update BL33's ep info with the NS HW config address */
+ param_node = get_bl_mem_params_node(BL33_IMAGE_ID);
assert(param_node != NULL);
- bl_mem_params_node_t *bl33_param_node = get_bl_mem_params_node(BL33_IMAGE_ID);
- assert(bl33_param_node != NULL);
-
#if TRANSFER_LIST
- ns_tl = transfer_list_init((void *)FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE);
- assert(ns_tl != NULL);
-
/* Update BL33's ep info with NS HW config address */
- te = transfer_list_add(ns_tl, TL_TAG_FDT, param_node->image_info.image_size,
- (void *)hw_config_info->config_addr);
+ te = transfer_list_find(ns_tl, TL_TAG_FDT);
assert(te != NULL);
- bl33_param_node->ep_info.args.arg1 = TRANSFER_LIST_SIGNATURE | REGISTER_CONVENTION_VERSION_MASK;
- bl33_param_node->ep_info.args.arg2 = 0;
- bl33_param_node->ep_info.args.arg3 = (uintptr_t)ns_tl;
- bl33_param_node->ep_info.args.arg0 = te ? (uintptr_t)transfer_list_entry_data(te) : 0;
+ param_node->ep_info.args.arg1 = TRANSFER_LIST_SIGNATURE |
+ REGISTER_CONVENTION_VERSION_MASK;
+ param_node->ep_info.args.arg2 = 0;
+ param_node->ep_info.args.arg3 = (uintptr_t)ns_tl;
+ param_node->ep_info.args.arg0 =
+ te ? (uintptr_t)transfer_list_entry_data(te) : 0;
#else
- /* Copy HW config from Secure address to NS address */
- memcpy((void *)hw_config_info->secondary_config_addr,
- (void *)hw_config_info->config_addr,
- (size_t)param_node->image_info.image_size);
-
- /*
- * Ensure HW-config device tree committed to memory, as there is
- * a possibility to use HW-config without cache and MMU enabled
- * at BL33
- */
- flush_dcache_range(hw_config_info->secondary_config_addr,
- param_node->image_info.image_size);
-
- bl33_param_node->ep_info.args.arg1 = hw_config_info->secondary_config_addr;
+ hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
+ assert(hw_config_info != NULL);
+
+ param_node->ep_info.args.arg1 = hw_config_info->secondary_config_addr;
#endif /* TRANSFER_LIST */
#endif /* !RESET_TO_BL2 && !EL3_PAYLOAD_BASE */
@@ -123,5 +103,38 @@ struct bl_params *plat_get_next_bl_params(void)
int bl2_plat_handle_post_image_load(unsigned int image_id)
{
+#if !RESET_TO_BL2 && !EL3_PAYLOAD_BASE
+ if (image_id == HW_CONFIG_ID) {
+ const struct dyn_cfg_dtb_info_t *hw_config_info;
+ struct transfer_list_entry *te __unused;
+
+ const bl_mem_params_node_t *param_node =
+ get_bl_mem_params_node(image_id);
+ assert(param_node != NULL);
+
+ hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
+ assert(hw_config_info != NULL);
+
+#if TRANSFER_LIST
+ /* Update BL33's ep info with NS HW config address */
+ te = transfer_list_add(ns_tl, TL_TAG_FDT,
+ param_node->image_info.image_size,
+ (void *)hw_config_info->config_addr);
+ assert(te != NULL);
+#else
+ memcpy((void *)hw_config_info->secondary_config_addr,
+ (void *)hw_config_info->config_addr,
+ (size_t)param_node->image_info.image_size);
+
+ /*
+ * Ensure HW-config device tree is committed to memory, as the HW-Config
+ * might be used without cache and MMU enabled at BL33.
+ */
+ flush_dcache_range(hw_config_info->secondary_config_addr,
+ param_node->image_info.image_size);
+#endif /* TRANSFER_LIST */
+ }
+#endif /* !RESET_TO_BL2 && !EL3_PAYLOAD_BASE */
+
return arm_bl2_plat_handle_post_image_load(image_id);
}