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authorHarrison Mutai <harrison.mutai@arm.com>2022-12-09 12:14:25 +0000
committerHarrison Mutai <harrison.mutai@arm.com>2023-01-25 09:40:33 +0000
commitaea4ccf8d9f3eabbc931f0e82df65ffca28c25e5 (patch)
tree8d59c00437acf25634525f592460b102f8c973ec /lib/psci/psci_private.h
parent695a48b5b4366d1005f8b9a0fc83726914668fb5 (diff)
fix(cpus): workaround for Cortex-A510 erratum 2684597
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The workaround is to execute a TSB CSYNC and DSB before executing WFI for power down. SDEN can be found here: https://developer.arm.com/documentation/SDEN1873361/latest https://developer.arm.com/documentation/SDEN1873351/latest Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Diffstat (limited to 'lib/psci/psci_private.h')
-rw-r--r--lib/psci/psci_private.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/psci/psci_private.h b/lib/psci/psci_private.h
index 1901c172f..6ca9ef694 100644
--- a/lib/psci/psci_private.h
+++ b/lib/psci/psci_private.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -304,6 +304,9 @@ int psci_spd_migrate_info(u_register_t *mpidr);
*/
void prepare_cpu_pwr_dwn(unsigned int power_level);
+/* This function applies various CPU errata during power down. */
+void apply_cpu_pwr_dwn_errata(void);
+
/* Private exported functions from psci_on.c */
int psci_cpu_on_start(u_register_t target_cpu,
const entry_point_info_t *ep);