diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2023-01-27 14:09:20 +0000 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2023-03-22 13:33:22 +0000 |
| commit | d5384b69d1180a596a48014d99e46eb4341f3455 (patch) | |
| tree | b7d0038c4533bfe7f384edf934dad786ef4fafe9 /lib/el3_runtime | |
| parent | 1223d2a020c12f80d764323b8a5bf3cd317d8d12 (diff) | |
refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED
At the moment we only support for FEAT_NV2 to be either unconditionally
compiled in, or to be not supported at all.
Add support for runtime detection (CTX_INCLUDE_NEVE_REGS=2), by
splitting get_armv8_4_feat_nv_support() into an ID register reading
function and a second function to report the support status. That
function considers both build time settings and runtime information
(if needed), and is used before we access the VNCR_EL2 system register.
Also move the context saving code from assembly to C, and use the new
is_feat_nv2_supported() function to guard its execution.
Change the FVP platform default to the now supported dynamic option (=2),
so the right decision can be made by the code at runtime.
Change-Id: I85b080641995fb72cfd4ac933f7a3f75770c2cb9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'lib/el3_runtime')
| -rw-r--r-- | lib/el3_runtime/aarch64/context.S | 24 | ||||
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 16 |
2 files changed, 10 insertions, 30 deletions
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S index 715406487..013a505d4 100644 --- a/lib/el3_runtime/aarch64/context.S +++ b/lib/el3_runtime/aarch64/context.S @@ -21,10 +21,6 @@ .global el2_sysregs_context_save_ras .global el2_sysregs_context_restore_ras #endif /* RAS_EXTENSION */ -#if CTX_INCLUDE_NEVE_REGS - .global el2_sysregs_context_save_nv2 - .global el2_sysregs_context_restore_nv2 -#endif /* CTX_INCLUDE_NEVE_REGS */ #endif /* CTX_INCLUDE_EL2_REGS */ .global el1_sysregs_context_save @@ -238,26 +234,6 @@ func el2_sysregs_context_restore_ras endfunc el2_sysregs_context_restore_ras #endif /* RAS_EXTENSION */ -#if CTX_INCLUDE_NEVE_REGS -func el2_sysregs_context_save_nv2 - /* - * VNCR_EL2 register is saved only when FEAT_NV2 is supported. - */ - mrs x16, vncr_el2 - str x16, [x0, #CTX_VNCR_EL2] - ret -endfunc el2_sysregs_context_save_nv2 - -func el2_sysregs_context_restore_nv2 - /* - * VNCR_EL2 register is restored only when FEAT_NV2 is supported. - */ - ldr x16, [x0, #CTX_VNCR_EL2] - msr vncr_el2, x16 - ret -endfunc el2_sysregs_context_restore_nv2 -#endif /* CTX_INCLUDE_NEVE_REGS */ - #endif /* CTX_INCLUDE_EL2_REGS */ /* ------------------------------------------------------------------ diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 8f46b80dc..2ba2f9ce2 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -970,9 +970,12 @@ void cm_el2_sysregs_context_save(uint32_t security_state) #if RAS_EXTENSION el2_sysregs_context_save_ras(el2_sysregs_ctx); #endif -#if CTX_INCLUDE_NEVE_REGS - el2_sysregs_context_save_nv2(el2_sysregs_ctx); -#endif + + if (is_feat_nv2_supported()) { + write_ctx_reg(el2_sysregs_ctx, CTX_VNCR_EL2, + read_vncr_el2()); + } + if (is_feat_trf_supported()) { write_ctx_reg(el2_sysregs_ctx, CTX_TRFCR_EL2, read_trfcr_el2()); } @@ -1036,9 +1039,10 @@ void cm_el2_sysregs_context_restore(uint32_t security_state) #if RAS_EXTENSION el2_sysregs_context_restore_ras(el2_sysregs_ctx); #endif -#if CTX_INCLUDE_NEVE_REGS - el2_sysregs_context_restore_nv2(el2_sysregs_ctx); -#endif + + if (is_feat_nv2_supported()) { + write_vncr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_VNCR_EL2)); + } if (is_feat_trf_supported()) { write_trfcr_el2(read_ctx_reg(el2_sysregs_ctx, CTX_TRFCR_EL2)); } |