diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2022-11-17 16:42:09 +0000 |
|---|---|---|
| committer | Andre Przywara <andre.przywara@arm.com> | 2023-03-20 13:37:36 +0000 |
| commit | 6437a09a2db5774438fb1a95c508ed6b0a9f0ef2 (patch) | |
| tree | 831ab1562452ab1700c3e40684dd871fb4deb083 /lib/el3_runtime | |
| parent | 90118bb5c180198db3386c3e1f5be8e32707c2cc (diff) | |
refactor(spe): enable FEAT_SPE for FEAT_STATE_CHECKED
At the moment we only support FEAT_SPE to be either unconditionally
compiled in, or to be not supported at all.
Add support for runtime detection (ENABLE_SPE_FOR_NS=2), by splitting
is_armv8_2_feat_spe_present() into an ID register reading function and
a second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we access SPE related registers.
Previously SPE was enabled unconditionally for all platforms, change
this now to the runtime detection version.
Change-Id: I830c094107ce6a398bf1f4aef7ffcb79d4f36552
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'lib/el3_runtime')
| -rw-r--r-- | lib/el3_runtime/aarch64/context_mgmt.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 50fddc502..c5f20ad35 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -482,9 +482,9 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep) static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx) { #if IMAGE_BL31 -#if ENABLE_SPE_FOR_NS - spe_enable(el2_unused); -#endif + if (is_feat_spe_supported()) { + spe_enable(el2_unused); + } #if ENABLE_AMU amu_enable(el2_unused, ctx); |