diff options
author | Bipin Ravi <bipin.ravi@arm.com> | 2023-09-18 19:28:32 -0500 |
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committer | Bipin Ravi <bipin.ravi@arm.com> | 2023-09-18 19:35:16 -0500 |
commit | ff342643bcfaf20d61148b90a068694fa1c44dca (patch) | |
tree | 9ed2b2dcc180a96bcd6aeab4d089d67435968918 /lib/cpus/aarch64 | |
parent | b01140256b5c0620cbde8e98c0df0e95343a3c71 (diff) |
fix(cpus): workaround for Neoverse V2 erratum 2779510
Neoverse V2 erratum 2779510 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
set bit[47] of CPUACTLR3_EL1 which might have a small impact on
power and negligible impact on performance.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I6d937747bdcbf2913a64c4037f99918cbc466e80
Diffstat (limited to 'lib/cpus/aarch64')
-rw-r--r-- | lib/cpus/aarch64/neoverse_v2.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/neoverse_v2.S b/lib/cpus/aarch64/neoverse_v2.S index 6c4adb12e..cde4032a8 100644 --- a/lib/cpus/aarch64/neoverse_v2.S +++ b/lib/cpus/aarch64/neoverse_v2.S @@ -35,6 +35,12 @@ workaround_reset_end neoverse_v2, ERRATUM(2719105) check_erratum_ls neoverse_v2, ERRATUM(2719105), CPU_REV(0, 1) +workaround_reset_start neoverse_v2, ERRATUM(2779510), ERRATA_V2_2779510 + sysreg_bit_set NEOVERSE_V2_CPUACTLR3_EL1, NEOVERSE_V2_CPUACTLR3_EL1_BIT_47 +workaround_reset_end neoverse_v2, ERRATUM(2779510) + +check_erratum_ls neoverse_v2, ERRATUM(2779510), CPU_REV(0, 1) + workaround_runtime_start neoverse_v2, ERRATUM(2801372), ERRATA_V2_2801372 /* dsb before isb of power down sequence */ dsb sy |