diff options
| author | Bipin Ravi <bipin.ravi@arm.com> | 2023-10-17 05:56:01 -0500 |
|---|---|---|
| committer | laurenw-arm <lauren.wehrmeister@arm.com> | 2023-11-02 10:12:33 -0500 |
| commit | 6cb8be17a53f4e11880ba13b78fca15895281cfe (patch) | |
| tree | fa828effba0a67a207d4ba70bccde63f0413a6cf /lib/cpus/aarch64 | |
| parent | 857c7643253d01e3e7ff8078a7812e2ed561ff67 (diff) | |
fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n2.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/neoverse_n2.S b/lib/cpus/aarch64/neoverse_n2.S index ead390800..f80115177 100644 --- a/lib/cpus/aarch64/neoverse_n2.S +++ b/lib/cpus/aarch64/neoverse_n2.S @@ -165,6 +165,16 @@ workaround_runtime_end neoverse_n2, ERRATUM(2326639) check_erratum_ls neoverse_n2, ERRATUM(2326639), CPU_REV(0, 0) +workaround_runtime_start neoverse_n2, ERRATUM(2346952), ERRATA_N2_2346952 + /* Set TXREQ to STATIC and full L2 TQ size */ + mrs x1, NEOVERSE_N2_CPUECTLR2_EL1 + mov x0, #CPUECTLR2_EL1_TXREQ_STATIC_FULL + bfi x1, x0, #CPUECTLR2_EL1_TXREQ_LSB, #CPUECTLR2_EL1_TXREQ_WIDTH + msr NEOVERSE_N2_CPUECTLR2_EL1, x1 +workaround_runtime_end neoverse_n2, ERRATUM(2346952) + +check_erratum_ls neoverse_n2, ERRATUM(2346952), CPU_REV(0, 2) + workaround_reset_start neoverse_n2, ERRATUM(2376738), ERRATA_N2_2376738 /* Set CPUACTLR2_EL1[0] to 1 to force PLDW/PFRM * ST to behave like PLD/PFRM LD and not cause |