diff options
| author | Bipin Ravi <bipin.ravi@arm.com> | 2023-09-18 19:54:41 -0500 |
|---|---|---|
| committer | Bipin Ravi <bipin.ravi@arm.com> | 2023-09-18 19:54:41 -0500 |
| commit | 58dd153cc88e832a6b019f1d4c2e6d64986ea69d (patch) | |
| tree | e236ea25e1cb8a88c8dcb88cc66d2a7ac74df3cd /lib/cpus/aarch64 | |
| parent | ff342643bcfaf20d61148b90a068694fa1c44dca (diff) | |
fix(cpus): workaround for Neoverse V2 erratum 2743011
Neoverse V2 erratum 2743011 is a Cat B erratum that applies to
all revisions <= r0p1 and is fixed in r0p2. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2332927/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e06ca723a1cce51fb027b7160f3dd06a4c93e64
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_v2.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/neoverse_v2.S b/lib/cpus/aarch64/neoverse_v2.S index cde4032a8..bfd088d50 100644 --- a/lib/cpus/aarch64/neoverse_v2.S +++ b/lib/cpus/aarch64/neoverse_v2.S @@ -35,6 +35,13 @@ workaround_reset_end neoverse_v2, ERRATUM(2719105) check_erratum_ls neoverse_v2, ERRATUM(2719105), CPU_REV(0, 1) +workaround_reset_start neoverse_v2, ERRATUM(2743011), ERRATA_V2_2743011 + sysreg_bit_set NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_55 + sysreg_bit_clear NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_56 +workaround_reset_end neoverse_v2, ERRATUM(2743011) + +check_erratum_ls neoverse_v2, ERRATUM(2743011), CPU_REV(0, 1) + workaround_reset_start neoverse_v2, ERRATUM(2779510), ERRATA_V2_2779510 sysreg_bit_set NEOVERSE_V2_CPUACTLR3_EL1, NEOVERSE_V2_CPUACTLR3_EL1_BIT_47 workaround_reset_end neoverse_v2, ERRATUM(2779510) |