diff options
| author | Arvind Ram Prakash <arvind.ramprakash@arm.com> | 2023-07-25 14:33:12 -0500 |
|---|---|---|
| committer | Arvind Ram Prakash <arvind.ramprakash@arm.com> | 2023-08-11 14:14:22 -0500 |
| commit | 471e0b8b345718f33779ba05922bcb0da89b4bac (patch) | |
| tree | 279cc70e25616c309137a83e5a3613e87dc9fb1b /lib/cpus/aarch64 | |
| parent | 2360d18bb5ec40841feced55a3fe4f344c752f29 (diff) | |
refactor(cpus): convert Neoverse Poseidon to framework
This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive
It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.
Testing was conducted by:
* Manual comparison of disassembly of converted functions with non-
converted functions
aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
* Build for release with all errata flags enabled and run default tftf
tests
CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp DEBUG=0 \
CTX_INCLUDE_AARCH32_REGS=0 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \
BL33=./../tf-a-tests/build/fvp/release/tftf.bin \
WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip
* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.
Change-Id: I34e27e468d4f971423a03a95a4a52f4af8bd783a
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_poseidon.S | 61 |
1 files changed, 17 insertions, 44 deletions
diff --git a/lib/cpus/aarch64/neoverse_poseidon.S b/lib/cpus/aarch64/neoverse_poseidon.S index 030293da0..d625ef6db 100644 --- a/lib/cpus/aarch64/neoverse_poseidon.S +++ b/lib/cpus/aarch64/neoverse_poseidon.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022, Arm Limited. All rights reserved. + * Copyright (c) 2022-2023, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -26,6 +26,19 @@ wa_cve_2022_23960_bhb_vector_table NEOVERSE_POSEIDON_BHB_LOOP_COUNT, neoverse_poseidon #endif /* WORKAROUND_CVE_2022_23960 */ +workaround_reset_start neoverse_poseidon, CVE(2022,23960), WORKAROUND_CVE_2022_23960 +#if IMAGE_BL31 + /* + * The Neoverse-poseidon generic vectors are overridden to apply errata + * mitigation on exception entry from lower ELs. + */ + adr x0, wa_cve_vbar_neoverse_poseidon + msr vbar_el3, x0 +#endif /* IMAGE_BL31 */ +workaround_reset_end neoverse_poseidon, CVE(2022,23960) + +check_erratum_chosen neoverse_poseidon, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 + /* --------------------------------------------- * HW will do the cache maintenance while powering down * --------------------------------------------- @@ -42,52 +55,12 @@ func neoverse_poseidon_core_pwr_dwn ret endfunc neoverse_poseidon_core_pwr_dwn -func check_errata_cve_2022_23960 -#if WORKAROUND_CVE_2022_23960 - mov x0, #ERRATA_APPLIES -#else - mov x0, #ERRATA_MISSING -#endif - ret -endfunc check_errata_cve_2022_23960 - -func neoverse_poseidon_reset_func +cpu_reset_func_start neoverse_poseidon /* Disable speculative loads */ msr SSBS, xzr +cpu_reset_func_end neoverse_poseidon -#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960 - /* - * The Neoverse Poseidon generic vectors are overridden to apply - * errata mitigation on exception entry from lower ELs. - */ - adr x0, wa_cve_vbar_neoverse_poseidon - msr vbar_el3, x0 -#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */ - - isb - ret -endfunc neoverse_poseidon_reset_func - -#if REPORT_ERRATA - /* - * Errata printing function for Neoverse Poseidon. Must follow AAPCS. - */ -func neoverse_poseidon_errata_report - stp x8, x30, [sp, #-16]! - - bl cpu_get_rev_var - mov x8, x0 - - /* - * Report all errata. The revision-variant information is passed to - * checking functions of each errata. - */ - report_errata WORKAROUND_CVE_2022_23960, neoverse_poseidon, cve_2022_23960 - - ldp x8, x30, [sp], #16 - ret -endfunc neoverse_poseidon_errata_report -#endif +errata_report_shim neoverse_poseidon /* --------------------------------------------- * This function provides Neoverse-Poseidon specific |