diff options
| author | Sona Mathew <sonarebecca.mathew@arm.com> | 2023-10-10 13:51:45 -0500 |
|---|---|---|
| committer | Sona Mathew <sonarebecca.mathew@arm.com> | 2023-10-24 14:09:54 -0500 |
| commit | 2bf7939a7b313352deb6c6b77ee1316eff142a7c (patch) | |
| tree | 49ad08afbe8ba6bb8213d187c6443c97810ec081 /lib/cpus/aarch64 | |
| parent | d6b458e82a06d92a50b6a2abad7a835aabfa2686 (diff) | |
fix(cpus): fix the rev-var for Cortex-A710
Update the revision and variant information in the
errata ABI file, cortex_A710.S file for erratum ID - 2058056
and erratum ID - 2055002 to match the revision and variant
in the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775101/latest
Change-Id: Ie010dae90dabf8670f588a06f9a606cf41e22afa
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a710.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index eab5ada7f..c618d986e 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -80,14 +80,14 @@ workaround_reset_start cortex_a710, ERRATUM(2055002), ERRATA_A710_2055002 sysreg_bit_set CORTEX_A710_CPUACTLR_EL1, CORTEX_A710_CPUACTLR_EL1_BIT_46 workaround_reset_end cortex_a710, ERRATUM(2055002) -check_erratum_ls cortex_a710, ERRATUM(2055002), CPU_REV(2, 0) +check_erratum_range cortex_a710, ERRATUM(2055002), CPU_REV(1, 0), CPU_REV(2, 0) workaround_reset_start cortex_a710, ERRATUM(2058056), ERRATA_A710_2058056 sysreg_bitfield_insert CORTEX_A710_CPUECTLR2_EL1, CORTEX_A710_CPUECTLR2_EL1_PF_MODE_CNSRV, \ CPUECTLR2_EL1_PF_MODE_LSB, CPUECTLR2_EL1_PF_MODE_WIDTH workaround_reset_end cortex_a710, ERRATUM(2058056) -check_erratum_ls cortex_a710, ERRATUM(2058056), CPU_REV(2, 0) +check_erratum_ls cortex_a710, ERRATUM(2058056), CPU_REV(2, 1) workaround_reset_start cortex_a710, ERRATUM(2081180), ERRATA_A710_2081180 ldr x0,=0x3 |