diff options
| author | Lauren Wehrmeister <lauren.wehrmeister@arm.com> | 2023-10-26 21:03:06 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-10-26 21:03:06 +0200 |
| commit | 113273aac483e8bc7ff02e84dc5ea7764e2569c6 (patch) | |
| tree | 4446fb49ce0a006940bf04274c72790d336516a7 /lib/cpus/aarch64 | |
| parent | 41095bd3f9c39aaeb4c7e9f47a9f4ef9087d712e (diff) | |
| parent | ab2b56df266f73aa53ca348d7945b119e1ef71c7 (diff) | |
Merge changes from topic "sm/err_errata" into integration
* changes:
fix(cpus): fix the rev-var of Neoverse-V1
fix(errata-abi): update the Neoverse-N2 errata ABI struct
fix(errata-abi): update the neoverse-N1 errata ABI struct
fix(cpus): fix the rev-var of Cortex-X2
fix(errata-abi): update the Cortex-A78C errata ABI struct
fix(cpus): update the rev-var for Cortex-A78AE
fix(errata-abi): update the Cortex-A76 errata ABI struct
fix(cpus): fix the rev-var for Cortex-A710
Diffstat (limited to 'lib/cpus/aarch64')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a710.S | 4 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_a78_ae.S | 2 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_x2.S | 2 | ||||
| -rw-r--r-- | lib/cpus/aarch64/neoverse_v1.S | 4 |
4 files changed, 6 insertions, 6 deletions
diff --git a/lib/cpus/aarch64/cortex_a710.S b/lib/cpus/aarch64/cortex_a710.S index eab5ada7f..c618d986e 100644 --- a/lib/cpus/aarch64/cortex_a710.S +++ b/lib/cpus/aarch64/cortex_a710.S @@ -80,14 +80,14 @@ workaround_reset_start cortex_a710, ERRATUM(2055002), ERRATA_A710_2055002 sysreg_bit_set CORTEX_A710_CPUACTLR_EL1, CORTEX_A710_CPUACTLR_EL1_BIT_46 workaround_reset_end cortex_a710, ERRATUM(2055002) -check_erratum_ls cortex_a710, ERRATUM(2055002), CPU_REV(2, 0) +check_erratum_range cortex_a710, ERRATUM(2055002), CPU_REV(1, 0), CPU_REV(2, 0) workaround_reset_start cortex_a710, ERRATUM(2058056), ERRATA_A710_2058056 sysreg_bitfield_insert CORTEX_A710_CPUECTLR2_EL1, CORTEX_A710_CPUECTLR2_EL1_PF_MODE_CNSRV, \ CPUECTLR2_EL1_PF_MODE_LSB, CPUECTLR2_EL1_PF_MODE_WIDTH workaround_reset_end cortex_a710, ERRATUM(2058056) -check_erratum_ls cortex_a710, ERRATUM(2058056), CPU_REV(2, 0) +check_erratum_ls cortex_a710, ERRATUM(2058056), CPU_REV(2, 1) workaround_reset_start cortex_a710, ERRATUM(2081180), ERRATA_A710_2081180 ldr x0,=0x3 diff --git a/lib/cpus/aarch64/cortex_a78_ae.S b/lib/cpus/aarch64/cortex_a78_ae.S index 94f6465c6..d3a3e5d88 100644 --- a/lib/cpus/aarch64/cortex_a78_ae.S +++ b/lib/cpus/aarch64/cortex_a78_ae.S @@ -70,7 +70,7 @@ workaround_reset_start cortex_a78_ae, ERRATUM(2376748), ERRATA_A78_AE_2376748 sysreg_bit_set CORTEX_A78_AE_ACTLR2_EL1, CORTEX_A78_AE_ACTLR2_EL1_BIT_0 workaround_reset_end cortex_a78_ae, ERRATUM(2376748) -check_erratum_ls cortex_a78_ae, ERRATUM(2376748), CPU_REV(0, 1) +check_erratum_ls cortex_a78_ae, ERRATUM(2376748), CPU_REV(0, 2) workaround_reset_start cortex_a78_ae, ERRATUM(2395408), ERRATA_A78_AE_2395408 /* -------------------------------------------------------- diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S index 816a58f65..855d196c4 100644 --- a/lib/cpus/aarch64/cortex_x2.S +++ b/lib/cpus/aarch64/cortex_x2.S @@ -50,7 +50,7 @@ workaround_reset_start cortex_x2, ERRATUM(2058056), ERRATA_X2_2058056 CORTEX_X2_CPUECTLR2_EL1_PF_MODE_SHIFT, CORTEX_X2_CPUECTLR2_EL1_PF_MODE_WIDTH workaround_reset_end cortex_x2, ERRATUM(2058056) -check_erratum_ls cortex_x2, ERRATUM(2058056), CPU_REV(2, 0) +check_erratum_ls cortex_x2, ERRATUM(2058056), CPU_REV(2, 1) workaround_reset_start cortex_x2, ERRATUM(2081180), ERRATA_X2_2081180 /* Apply instruction patching sequence */ diff --git a/lib/cpus/aarch64/neoverse_v1.S b/lib/cpus/aarch64/neoverse_v1.S index 35d2c480f..2a49134fc 100644 --- a/lib/cpus/aarch64/neoverse_v1.S +++ b/lib/cpus/aarch64/neoverse_v1.S @@ -161,7 +161,7 @@ workaround_reset_start neoverse_v1, ERRATUM(2108267), ERRATA_V1_2108267 msr NEOVERSE_V1_CPUECTLR_EL1, x1 workaround_reset_end neoverse_v1, ERRATUM(2108267) -check_erratum_ls neoverse_v1, ERRATUM(2108267), CPU_REV(1, 1) +check_erratum_ls neoverse_v1, ERRATUM(2108267), CPU_REV(1, 2) workaround_reset_start neoverse_v1, ERRATUM(2139242), ERRATA_V1_2139242 mov x0, #0x3 @@ -194,7 +194,7 @@ workaround_reset_start neoverse_v1, ERRATUM(2294912), ERRATA_V1_2294912 sysreg_bit_set NEOVERSE_V1_ACTLR2_EL1, NEOVERSE_V1_ACTLR2_EL1_BIT_0 workaround_reset_end neoverse_v1, ERRATUM(2294912) -check_erratum_ls neoverse_v1, ERRATUM(2294912), CPU_REV(1, 1) +check_erratum_ls neoverse_v1, ERRATUM(2294912), CPU_REV(1, 2) workaround_reset_start neoverse_v1, ERRATUM(2372203), ERRATA_V1_2372203 /* Set bit 40 in ACTLR2_EL1 */ |