diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2023-03-21 13:53:19 +0000 |
|---|---|---|
| committer | Manish Pandey <manish.pandey2@arm.com> | 2023-03-27 19:36:00 +0100 |
| commit | d23acc9e4f94d95280ee7985e3f96482eb7fe04d (patch) | |
| tree | fcdaca586dc8781d27b0fc76a5739c66eaea5ed9 /lib/cpus/aarch64/neoverse_n1.S | |
| parent | 82f5b5098b7674f5b8c6b1e3cd24902b6a508f5a (diff) | |
refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1
So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.
Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.
Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'lib/cpus/aarch64/neoverse_n1.S')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index ec62519f5..827c0b0c7 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -585,7 +585,7 @@ func neoverse_n1_reset_func bl errata_n1_1946160_wa #endif -#if ENABLE_AMU +#if ENABLE_FEAT_AMU /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */ mrs x0, actlr_el3 orr x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT |