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| author | Manish Pandey <manish.pandey2@arm.com> | 2023-03-29 15:20:32 +0100 |
|---|---|---|
| committer | Manish Pandey <manish.pandey2@arm.com> | 2023-04-24 17:32:22 +0100 |
| commit | 9ec2ca2d453176179f923d7e0fbaac05341ebdc6 (patch) | |
| tree | 1735e8cec4c0e986ef38ac55c897bb981d01108e /lib/cpus/aarch64/neoverse_n1.S | |
| parent | edee0430d42c92cdb5119f950aee506012b327a6 (diff) | |
fix(cpus): do not put RAS check before using esb
If RAS Extension is not implemented esb instruction executes as a NOP.
No need to have a check for RAS presence in the code.
Also, The handler is related to a synchronous exceptions which
implicitly is part of BL31 image only, so remove that check too.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If4264504cba9f0642b7b9c581ae66cd4deace32b
Diffstat (limited to 'lib/cpus/aarch64/neoverse_n1.S')
| -rw-r--r-- | lib/cpus/aarch64/neoverse_n1.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S index 827c0b0c7..2cf94c758 100644 --- a/lib/cpus/aarch64/neoverse_n1.S +++ b/lib/cpus/aarch64/neoverse_n1.S @@ -706,7 +706,6 @@ func neoverse_n1_errata_ic_trap_handler ldp x4, x5, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X4] ldr x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] -#if IMAGE_BL31 && RAS_EXTENSION /* * Issue Error Synchronization Barrier to synchronize SErrors before * exiting EL3. We're running with EAs unmasked, so any synchronized @@ -714,7 +713,6 @@ func neoverse_n1_errata_ic_trap_handler * DISR_EL1 register. */ esb -#endif exception_return 1: ret |