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authorDimitris Papastamos <dimitris.papastamos@arm.com>2018-05-16 11:36:14 +0100
committerDimitris Papastamos <dimitris.papastamos@arm.com>2018-05-23 12:45:48 +0100
commitfe007b2e15ec7b569c07fedbd9bfccb5ed742eec (patch)
tree5a4273d0322ec9567c2bb472a10d9d9c3cb9908a /lib/cpus/aarch64/cortex_a72.S
parente0865708155826a70e2199a54cab8e90e8d07a32 (diff)
Add support for dynamic mitigation for CVE-2018-3639
Some CPUS may benefit from using a dynamic mitigation approach for CVE-2018-3639. A new SMC interface is defined to allow software executing in lower ELs to enable or disable the mitigation for their execution context. It should be noted that regardless of the state of the mitigation for lower ELs, code executing in EL3 is always mitigated against CVE-2018-3639. NOTE: This change is a compatibility break for any platform using the declare_cpu_ops_workaround_cve_2017_5715 macro. Migrate to the declare_cpu_ops_wa macro instead. Change-Id: I3509a9337ad217bbd96de9f380c4ff8bf7917013 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
Diffstat (limited to 'lib/cpus/aarch64/cortex_a72.S')
-rw-r--r--lib/cpus/aarch64/cortex_a72.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/cpus/aarch64/cortex_a72.S b/lib/cpus/aarch64/cortex_a72.S
index 6ef35cfcf..bb9381d17 100644
--- a/lib/cpus/aarch64/cortex_a72.S
+++ b/lib/cpus/aarch64/cortex_a72.S
@@ -310,8 +310,9 @@ func cortex_a72_cpu_reg_dump
ret
endfunc cortex_a72_cpu_reg_dump
-declare_cpu_ops_workaround_cve_2017_5715 cortex_a72, CORTEX_A72_MIDR, \
+declare_cpu_ops_wa cortex_a72, CORTEX_A72_MIDR, \
cortex_a72_reset_func, \
check_errata_cve_2017_5715, \
+ CPU_NO_EXTRA2_FUNC, \
cortex_a72_core_pwr_dwn, \
cortex_a72_cluster_pwr_dwn