summaryrefslogtreecommitdiff
path: root/lib/cpus/aarch64/cortex_a57.S
diff options
context:
space:
mode:
authorSoby Mathew <soby.mathew@arm.com>2014-08-14 16:19:29 +0100
committerDan Handley <dan.handley@arm.com>2014-08-20 19:14:31 +0100
commitd9bdaf2d989f7d594cd17fdd4c6e5a0665610266 (patch)
tree7b789dbc50f9d156774ea3bdb022306fc54347cb /lib/cpus/aarch64/cortex_a57.S
parentd3f70af6e09d669da9c7d7890b7af5a0cdc4b3a5 (diff)
Add support for selected Cortex-A57 errata workarounds
This patch adds workarounds for selected errata which affect the Cortex-A57 r0p0 part. Each workaround has a build time flag which should be used by the platform port to enable or disable the corresponding workaround. The workarounds are disabled by default. An assertion is raised if the platform enables a workaround which does not match the CPU revision at runtime. Change-Id: I9ae96b01c6ff733d04dc733bd4e67dbf77b29fb0
Diffstat (limited to 'lib/cpus/aarch64/cortex_a57.S')
-rw-r--r--lib/cpus/aarch64/cortex_a57.S27
1 files changed, 27 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S
index 8b788566d..eed1bbb9f 100644
--- a/lib/cpus/aarch64/cortex_a57.S
+++ b/lib/cpus/aarch64/cortex_a57.S
@@ -29,6 +29,7 @@
*/
#include <arch.h>
#include <asm_macros.S>
+#include <assert_macros.S>
#include <cortex_a57.h>
#include <cpu_macros.S>
#include <plat_macros.S>
@@ -81,6 +82,32 @@ func cortex_a57_disable_ext_debug
ret
func cortex_a57_reset_func
+#if ERRATA_A57_806969 || ERRATA_A57_813420
+ /* ---------------------------------------------
+ * Ensure that the following errata is only
+ * applied on r0p0 parts.
+ * ---------------------------------------------
+ */
+#if ASM_ASSERTION
+ mrs x0, midr_el1
+ ubfx x1, x0, #MIDR_VAR_SHIFT, #4
+ ubfx x2, x0, #MIDR_REV_SHIFT, #4
+ orr x0, x1, x2
+ cmp x0, #0
+ ASM_ASSERT(eq)
+#endif
+ mov x1, xzr
+#if ERRATA_A57_806969
+ orr x1, x1, #CPUACTLR_NO_ALLOC_WBWA
+#endif
+#if ERRATA_A57_813420
+ orr x1, x1, #CPUACTLR_DCC_AS_DCCI
+#endif
+ mrs x0, CPUACTLR_EL1
+ orr x0, x0, x1
+ msr CPUACTLR_EL1, x0
+#endif
+
/* ---------------------------------------------
* As a bare minimum enable the SMP bit.
* ---------------------------------------------