diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2014-08-14 13:36:41 +0100 |
|---|---|---|
| committer | Dan Handley <dan.handley@arm.com> | 2014-08-20 19:14:31 +0100 |
| commit | d3f70af6e09d669da9c7d7890b7af5a0cdc4b3a5 (patch) | |
| tree | 30c78c0c34a461ddc00ec1d1828ea5c53abbeb8d /lib/cpus/aarch64/cortex_a57.S | |
| parent | add403514d0f792b9df3c81006cd9a9395b213f6 (diff) | |
Add CPU specific crash reporting handlers
This patch adds handlers for dumping Cortex-A57 and Cortex-A53 specific register
state to the CPU specific operations framework. The contents of CPUECTLR_EL1 are
dumped currently.
Change-Id: I63d3dbfc4ac52fef5e25a8cf6b937c6f0975c8ab
Diffstat (limited to 'lib/cpus/aarch64/cortex_a57.S')
| -rw-r--r-- | lib/cpus/aarch64/cortex_a57.S | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/lib/cpus/aarch64/cortex_a57.S b/lib/cpus/aarch64/cortex_a57.S index 8de7fe921..8b788566d 100644 --- a/lib/cpus/aarch64/cortex_a57.S +++ b/lib/cpus/aarch64/cortex_a57.S @@ -167,4 +167,23 @@ func cortex_a57_cluster_pwr_dwn mov x30, x18 b cortex_a57_disable_ext_debug + /* --------------------------------------------- + * This function provides cortex_a57 specific + * register information for crash reporting. + * It needs to return with x6 pointing to + * a list of register names in ascii and + * x8 - x15 having values of registers to be + * reported. + * --------------------------------------------- + */ +.section .rodata.cortex_a57_regs, "aS" +cortex_a57_regs: /* The ascii list of register names to be reported */ + .asciz "cpuectlr_el1", "" + +func cortex_a57_cpu_reg_dump + adr x6, cortex_a57_regs + mrs x8, CPUECTLR_EL1 + ret + + declare_cpu_ops cortex_a57, CORTEX_A57_MIDR |