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author | Bipin Ravi <bipin.ravi@arm.com> | 2023-09-08 22:18:32 +0200 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-09-08 22:18:32 +0200 |
commit | e99df5c295717c2ca0bb9093432454a153a3025c (patch) | |
tree | 785cf7ff2b4616907a696b19e072f91af17b82c8 /docs | |
parent | 77fc89fd22a04e2e78352e9b3345e6d0b8239524 (diff) | |
parent | 5b0e4438d0e604e80ffff17d02e37cae0f4b2a8f (diff) |
Merge changes from topic "sm/errata_X3" into integration
* changes:
fix(cpus): workaround for Cortex-X3 erratum 2742421
feat(errata_abi): add support for Cortex-X3
Diffstat (limited to 'docs')
-rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 7bf77609e..d1bf0d3d8 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -718,6 +718,10 @@ For Cortex-X3, the following errata build flags are defined : CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the CPU, it is still open. +- ``ERRATA_X3_2742421``: This applies errata 2742421 workaround to + Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and + r1p1. It is fixed in r1p2. + For Cortex-A510, the following errata build flags are defined : - ``ERRATA_A510_1922240``: This applies errata 1922240 workaround to |