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author | Bipin Ravi <bipin.ravi@arm.com> | 2023-10-05 19:26:18 +0200 |
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committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-10-05 19:26:18 +0200 |
commit | 7a8b6f64f9a7dc2e9b7ce20892e5f23e64ad1b76 (patch) | |
tree | 998e390bb4a46adc2bda353635c2ef17110f8ac3 /docs | |
parent | 17eebc76b7230ca9501932b93d238ea5b72d8ab2 (diff) | |
parent | 2454316c2ae4411d0071d88c3db3c95598f12498 (diff) |
Merge "fix(cpus): workaround for Cortex-X3 erratum 2070301" into integration
Diffstat (limited to 'docs')
-rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index bf0455809..ad05a505a 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -726,6 +726,10 @@ For Cortex-X2, the following errata build flags are defined : For Cortex-X3, the following errata build flags are defined : +- ``ERRATA_X3_2070301``: This applies errata 2070301 workaround to the Cortex-X3 + CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 of + the CPU and is still open. + - ``ERRATA_X3_2313909``: This applies errata 2313909 workaround to Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it is fixed in r1p1. |