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authorStephan Gerhold <stephan@gerhold.net>2023-04-17 14:47:40 +0200
committerStephan Gerhold <stephan@gerhold.net>2023-08-04 16:02:59 +0200
commit56055e87b0a756d4756a22ed26b855fbe7afe93c (patch)
tree301d4b2289aee181b2935872581f71615124b5aa /bl32
parentcd0786c73e536a1d2507d77ce49e2ae2b8ee71a1 (diff)
fix(bl32): avoid clearing argument registers in RESET_TO_SP_MIN case
RESET_TO_SP_MIN is also used by platforms with a non TF-A bootloader, in which case there might be platform-specific arguments passed in the CPU registers. At the moment these are cleared and cannot be used by the platform layer. For BL31 this was recently changed in "fix(bl31): avoid clearing of argument registers in RESET_TO_BL31 case", but on AArch32 SP_MIN still has the old behavior. Make this consistent by preserving the registers in SP_MIN as well and use the chance to clarify the existing comments a bit. Change-Id: I0039c72477249eed76c3da23cb4f10ac59b310d0 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Diffstat (limited to 'bl32')
-rw-r--r--bl32/sp_min/aarch32/entrypoint.S29
1 files changed, 7 insertions, 22 deletions
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S
index f10296724..693dd4b82 100644
--- a/bl32/sp_min/aarch32/entrypoint.S
+++ b/bl32/sp_min/aarch32/entrypoint.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -62,11 +62,8 @@ vector_base sp_min_vector_table
* The Cold boot/Reset entrypoint for SP_MIN
*/
func sp_min_entrypoint
-#if !RESET_TO_SP_MIN
/* ---------------------------------------------------------------
- * Preceding bootloader has populated r0 with a pointer to a
- * 'bl_params_t' structure & r1 with a pointer to platform
- * specific structure
+ * Stash the previous bootloader arguments r0 - r3 for later use.
* ---------------------------------------------------------------
*/
mov r9, r0
@@ -74,6 +71,7 @@ func sp_min_entrypoint
mov r11, r2
mov r12, r3
+#if !RESET_TO_SP_MIN
/* ---------------------------------------------------------------------
* For !RESET_TO_SP_MIN systems, only the primary CPU ever reaches
* sp_min_entrypoint() during the cold boot flow, so the cold/warm boot
@@ -91,11 +89,6 @@ func sp_min_entrypoint
_init_c_runtime=1 \
_exception_vectors=sp_min_vector_table \
_pie_fixup_size=FIXUP_SIZE
-
- /* ---------------------------------------------------------------------
- * Relay the previous bootloader's arguments to the platform layer
- * ---------------------------------------------------------------------
- */
#else
/* ---------------------------------------------------------------------
* For RESET_TO_SP_MIN systems which have a programmable reset address,
@@ -111,24 +104,16 @@ func sp_min_entrypoint
_init_c_runtime=1 \
_exception_vectors=sp_min_vector_table \
_pie_fixup_size=FIXUP_SIZE
-
- /* ---------------------------------------------------------------------
- * For RESET_TO_SP_MIN systems, BL32 (SP_MIN) is the first bootloader
- * to run so there's no argument to relay from a previous bootloader.
- * Zero the arguments passed to the platform layer to reflect that.
- * ---------------------------------------------------------------------
- */
- mov r9, #0
- mov r10, #0
- mov r11, #0
- mov r12, #0
-
#endif /* RESET_TO_SP_MIN */
#if SP_MIN_WITH_SECURE_FIQ
route_fiq_to_sp_min r4
#endif
+ /* ---------------------------------------------------------------------
+ * Relay the previous bootloader's arguments to the platform layer
+ * ---------------------------------------------------------------------
+ */
mov r0, r9
mov r1, r10
mov r2, r11