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authorManish V Badarkhe <Manish.Badarkhe@arm.com>2021-07-07 16:27:10 +0100
committerManish V Badarkhe <Manish.Badarkhe@arm.com>2021-08-26 09:29:51 +0100
commit2031d6166a58623ae59034bc2353fcd2fabe9c30 (patch)
tree4e77afe1e3b6d3ca0290cf98c4490456787bc895 /bl32
parent813524ea9d2e4138246b8f77a772299e52fb33bc (diff)
feat(sys_reg_trace): initialize trap settings of trace system registers access
Trap bits of trace system registers access are in architecturally UNKNOWN state at boot hence 1. Initialized trap bits to one to prohibit trace system registers accesses in lower ELs (EL2, EL1) in all security states when system trace registers are implemented. 2. These bits are RES0 in the absence of system trace register support and hence set it to zero to aligns with the Arm ARM reference recommendation,that mentions software must writes RES0 bits with all 0s. Change-Id: I4b6c15cda882325273492895d72568b29de89ca3 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Diffstat (limited to 'bl32')
0 files changed, 0 insertions, 0 deletions