diff options
author | Harrison Mutai <harrison.mutai@arm.com> | 2023-04-19 10:08:56 +0100 |
---|---|---|
committer | Harrison Mutai <harrison.mutai@arm.com> | 2023-05-12 14:38:22 +0100 |
commit | f6088168f0608604bc1cd57d8ab52d848fdb835b (patch) | |
tree | 8034ec7ce97878470376122d06937ed78d3d5c2b /bl2 | |
parent | 5e7e8bfa4f6ea38d7f001fd1a4a1f266049241c8 (diff) |
build(bl2): add symbols for memory layout
Add symbols for mapping the physical memory layout of BL2. There are
symbols that partially satisfy this requirement, however, the naming of
these is inconsistent.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Change-Id: I83ce5e3f5c45b71022279649f823ed0cb33a145d
Diffstat (limited to 'bl2')
-rw-r--r-- | bl2/bl2.ld.S | 3 | ||||
-rw-r--r-- | bl2/bl2_el3.ld.S | 13 |
2 files changed, 16 insertions, 0 deletions
diff --git a/bl2/bl2.ld.S b/bl2/bl2.ld.S index 458a12b92..5f689d55c 100644 --- a/bl2/bl2.ld.S +++ b/bl2/bl2.ld.S @@ -16,6 +16,8 @@ MEMORY { } SECTIONS { + RAM_REGION_START = ORIGIN(RAM); + RAM_REGION_LENGTH = LENGTH(RAM); . = BL2_BASE; ASSERT(. == ALIGN(PAGE_SIZE), @@ -116,6 +118,7 @@ SECTIONS { __RW_END__ = .; __BL2_END__ = .; + RAM_REGION_END = .; __BSS_SIZE__ = SIZEOF(.bss); diff --git a/bl2/bl2_el3.ld.S b/bl2/bl2_el3.ld.S index aa457faf4..5da631c07 100644 --- a/bl2/bl2_el3.ld.S +++ b/bl2/bl2_el3.ld.S @@ -31,7 +31,12 @@ MEMORY { #endif /* !BL2_IN_XIP_MEM */ SECTIONS { + RAM_REGION_START = ORIGIN(RAM); + RAM_REGION_LENGTH = LENGTH(RAM); #if BL2_IN_XIP_MEM + ROM_REGION_START = ORIGIN(ROM); + ROM_REGION_LENGTH = LENGTH(ROM); + . = BL2_RO_BASE; ASSERT(. == ALIGN(PAGE_SIZE), @@ -43,6 +48,11 @@ SECTIONS { "BL2_BASE address is not aligned on a page boundary.") #endif /* BL2_IN_XIP_MEM */ +#if SEPARATE_BL2_NOLOAD_REGION + RAM_NOLOAD_REGION_START = ORIGIN(RAM_NOLOAD); + RAM_NOLOAD_REGION_LENGTH = LENGTH(RAM_NOLOAD); +#endif + #if SEPARATE_CODE_AND_RODATA .text . : { __TEXT_START__ = .; @@ -109,6 +119,7 @@ SECTIONS { "cpu_ops not defined for this platform.") #if BL2_IN_XIP_MEM + ROM_REGION_END = .; . = BL2_RW_BASE; ASSERT(BL2_RW_BASE == ALIGN(PAGE_SIZE), @@ -138,6 +149,7 @@ SECTIONS { #if SEPARATE_BL2_NOLOAD_REGION __BL2_NOLOAD_END__ = .; + RAM_NOLOAD_REGION_END = .; . = SAVED_ADDR; #endif /* SEPARATE_BL2_NOLOAD_REGION */ @@ -198,6 +210,7 @@ SECTIONS { __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__; #endif /* USE_COHERENT_MEM */ + RAM_REGION_END = .; #if BL2_IN_XIP_MEM ASSERT(. <= BL2_RW_LIMIT, "BL2's RW content has exceeded its limit.") #else /* BL2_IN_XIP_MEM */ |