diff options
author | Jiafei Pan <Jiafei.Pan@nxp.com> | 2022-02-24 10:47:33 +0800 |
---|---|---|
committer | Jiafei Pan <Jiafei.Pan@nxp.com> | 2022-03-27 23:24:24 +0800 |
commit | 96a8ed14b74cca33a8caf567d0f0a2d3b2483a3b (patch) | |
tree | 64d2a54478598d5a645f3fd140a06e35fc76e2c2 | |
parent | ceae374357b85b4953f8462512412e2f4f1c3d76 (diff) |
feat(bl2): add support to separate no-loadable sections
Add new options SEPARATE_BL2_NOLOAD_REGION to separate no-loadable
sections (.bss, stack, page tables) to a ram region specified
by BL2_NOLOAD_START and BL2_NOLOAD_LIMIT.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I844ee0fc405474af0aff978d292c826fbe0a82fd
-rw-r--r-- | Makefile | 2 | ||||
-rw-r--r-- | bl2/bl2_el3.ld.S | 22 | ||||
-rw-r--r-- | docs/getting_started/build-options.rst | 9 | ||||
-rw-r--r-- | include/arch/aarch32/el3_common_macros.S | 8 | ||||
-rw-r--r-- | include/arch/aarch64/el3_common_macros.S | 8 | ||||
-rw-r--r-- | make_helpers/defaults.mk | 4 |
6 files changed, 47 insertions, 6 deletions
@@ -1021,6 +1021,7 @@ $(eval $(call assert_booleans,\ RESET_TO_BL31 \ SAVE_KEYS \ SEPARATE_CODE_AND_RODATA \ + SEPARATE_BL2_NOLOAD_REGION \ SEPARATE_NOBITS_REGION \ SPIN_ON_BL1_EXIT \ SPM_MM \ @@ -1136,6 +1137,7 @@ $(eval $(call add_defines,\ RAS_EXTENSION \ RESET_TO_BL31 \ SEPARATE_CODE_AND_RODATA \ + SEPARATE_BL2_NOLOAD_REGION \ SEPARATE_NOBITS_REGION \ RECLAIM_INIT_CODE \ SPD_${SPD} \ diff --git a/bl2/bl2_el3.ld.S b/bl2/bl2_el3.ld.S index bc1794c06..6aa7afd61 100644 --- a/bl2/bl2_el3.ld.S +++ b/bl2/bl2_el3.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,6 +17,11 @@ MEMORY { RAM (rwx): ORIGIN = BL2_RW_BASE, LENGTH = BL2_RW_LIMIT - BL2_RW_BASE #else RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE +#if SEPARATE_BL2_NOLOAD_REGION + RAM_NOLOAD (rw!a): ORIGIN = BL2_NOLOAD_START, LENGTH = BL2_NOLOAD_LIMIT - BL2_NOLOAD_START +#else +#define RAM_NOLOAD RAM +#endif #endif } @@ -106,9 +111,18 @@ SECTIONS __DATA_RAM_END__ = __DATA_END__; RELA_SECTION >RAM - STACK_SECTION >RAM - BSS_SECTION >RAM - XLAT_TABLE_SECTION >RAM +#if SEPARATE_BL2_NOLOAD_REGION + SAVED_ADDR = .; + . = BL2_NOLOAD_START; + __BL2_NOLOAD_START__ = .; +#endif + STACK_SECTION >RAM_NOLOAD + BSS_SECTION >RAM_NOLOAD + XLAT_TABLE_SECTION >RAM_NOLOAD +#if SEPARATE_BL2_NOLOAD_REGION + __BL2_NOLOAD_END__ = .; + . = SAVED_ADDR; +#endif #if USE_COHERENT_MEM /* diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst index a34bb3cef..adc05e6dd 100644 --- a/docs/getting_started/build-options.rst +++ b/docs/getting_started/build-options.rst @@ -647,6 +647,13 @@ Common build options ``BL31_NOBITS_LIMIT``. When the option is ``0`` (the default), NOBITS sections are placed in RAM immediately following the loaded firmware image. +- ``SEPARATE_BL2_NOLOAD_REGION``: Setting this option to ``1`` allows the + NOLOAD sections of BL2 (.bss, stacks, page tables) to be allocated in RAM + discontiguous from loaded firmware images. When set, the platform need to + provide definitions of ``BL2_NOLOAD_START`` and ``BL2_NOLOAD_LIMIT``. This + flag is disabled by default and NOLOAD sections are placed in RAM immediately + following the loaded firmware image. + - ``SMC_PCI_SUPPORT``: This option allows platforms to handle PCI configuration access requests via a standard SMCCC defined in `DEN0115`_. When combined with UEFI+ACPI this can provide a certain amount of OS forward compatibility @@ -961,7 +968,7 @@ Firmware update options -------------- -*Copyright (c) 2019-2021, Arm Limited. All rights reserved.* +*Copyright (c) 2019-2022, Arm Limited. All rights reserved.* .. _DEN0115: https://developer.arm.com/docs/den0115/latest .. _PSA FW update specification: https://developer.arm.com/documentation/den0118/a/ diff --git a/include/arch/aarch32/el3_common_macros.S b/include/arch/aarch32/el3_common_macros.S index ad2a03911..8b6765a96 100644 --- a/include/arch/aarch32/el3_common_macros.S +++ b/include/arch/aarch32/el3_common_macros.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -398,6 +398,12 @@ ldr r1, =__RW_END__ sub r1, r1, r0 bl inv_dcache_range +#if defined(IMAGE_BL2) && SEPARATE_BL2_NOLOAD_REGION + ldr r0, =__BL2_NOLOAD_START__ + ldr r1, =__BL2_NOLOAD_END__ + sub r1, r1, r0 + bl inv_dcache_range +#endif #endif /* diff --git a/include/arch/aarch64/el3_common_macros.S b/include/arch/aarch64/el3_common_macros.S index d47244ebd..de2b931af 100644 --- a/include/arch/aarch64/el3_common_macros.S +++ b/include/arch/aarch64/el3_common_macros.S @@ -469,6 +469,14 @@ sub x1, x1, x0 bl inv_dcache_range #endif +#if defined(IMAGE_BL2) && SEPARATE_BL2_NOLOAD_REGION + adrp x0, __BL2_NOLOAD_START__ + add x0, x0, :lo12:__BL2_NOLOAD_START__ + adrp x1, __BL2_NOLOAD_END__ + add x1, x1, :lo12:__BL2_NOLOAD_END__ + sub x1, x1, x0 + bl inv_dcache_range +#endif #endif adrp x0, __BSS_START__ add x0, x0, :lo12:__BSS_START__ diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk index b39dcf40f..910ffdf54 100644 --- a/make_helpers/defaults.mk +++ b/make_helpers/defaults.mk @@ -250,6 +250,10 @@ SEPARATE_CODE_AND_RODATA := 0 # separate memory region, which may be discontiguous from the rest of BL31. SEPARATE_NOBITS_REGION := 0 +# Put BL2 NOLOAD sections (.bss, stacks, page tables) in a separate memory +# region, platform Makefile is free to override this value. +SEPARATE_BL2_NOLOAD_REGION := 0 + # If the BL31 image initialisation code is recalimed after use for the secondary # cores stack RECLAIM_INIT_CODE := 0 |