diff options
| author | Sona Mathew <sonarebecca.mathew@arm.com> | 2023-10-16 13:33:18 -0500 |
|---|---|---|
| committer | Sona Mathew <sonarebecca.mathew@arm.com> | 2023-10-24 14:15:17 -0500 |
| commit | 8ae66d624e2f7cae9577ff8f99e0a45e21fb353d (patch) | |
| tree | 8e0bbdc0c006176b0e664f1ff477760737ee73a4 | |
| parent | 7f2caecdbc64d1fbd34942285e1194e85c5e8614 (diff) | |
fix(cpus): fix the rev-var of Cortex-X2
Update the revision and variant information in the
errata ABI file, cortex_X2.S file for erratum ID - 2058056
to match the revision and variant in the latest SDEN.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I28ee39949d977c53d6f5243100f0c29bc3c0428c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 2 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_x2.S | 2 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 2 | ||||
| -rw-r--r-- | services/std_svc/errata_abi/errata_abi_main.c | 6 |
4 files changed, 6 insertions, 6 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 2cf7992bf..e67fca228 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -685,7 +685,7 @@ For Cortex-X2, the following errata build flags are defined : it is still open. - ``ERRATA_X2_2058056``: This applies errata 2058056 workaround to Cortex-X2 - CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU, + CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the CPU, it is still open. - ``ERRATA_X2_2083908``: This applies errata 2083908 workaround to Cortex-X2 diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S index 816a58f65..855d196c4 100644 --- a/lib/cpus/aarch64/cortex_x2.S +++ b/lib/cpus/aarch64/cortex_x2.S @@ -50,7 +50,7 @@ workaround_reset_start cortex_x2, ERRATUM(2058056), ERRATA_X2_2058056 CORTEX_X2_CPUECTLR2_EL1_PF_MODE_SHIFT, CORTEX_X2_CPUECTLR2_EL1_PF_MODE_WIDTH workaround_reset_end cortex_x2, ERRATUM(2058056) -check_erratum_ls cortex_x2, ERRATUM(2058056), CPU_REV(2, 0) +check_erratum_ls cortex_x2, ERRATUM(2058056), CPU_REV(2, 1) workaround_reset_start cortex_x2, ERRATUM(2081180), ERRATA_X2_2081180 /* Apply instruction patching sequence */ diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 82212f938..019924ffe 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -690,7 +690,7 @@ CPU_FLAG_LIST += ERRATA_N2_2779511 CPU_FLAG_LIST += ERRATA_X2_2002765 # Flag to apply erratum 2058056 workaround during reset. This erratum applies -# to revisions r0p0, r1p0, and r2p0 of the Cortex-X2 cpu and is still open. +# to revisions r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still open. CPU_FLAG_LIST += ERRATA_X2_2058056 # Flag to apply erratum 2083908 workaround during reset. This erratum applies diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c index 93f0efef3..2bf7000bd 100644 --- a/services/std_svc/errata_abi/errata_abi_main.c +++ b/services/std_svc/errata_abi/errata_abi_main.c @@ -366,13 +366,13 @@ struct em_cpu_list cpu_list[] = { .cpu_errata_list = { [0] = {2002765, 0x00, 0x20, ERRATA_X2_2002765}, [1] = {2017096, 0x00, 0x20, ERRATA_X2_2017096}, - [2] = {2058056, 0x00, 0x20, ERRATA_X2_2058056}, + [2] = {2058056, 0x00, 0x21, ERRATA_X2_2058056}, [3] = {2081180, 0x00, 0x20, ERRATA_X2_2081180}, - [4] = {2083908, 0x00, 0x20, ERRATA_X2_2083908}, + [4] = {2083908, 0x20, 0x20, ERRATA_X2_2083908}, [5] = {2147715, 0x20, 0x20, ERRATA_X2_2147715}, [6] = {2216384, 0x00, 0x20, ERRATA_X2_2216384}, [7] = {2282622, 0x00, 0x21, ERRATA_X2_2282622}, - [8] = {2371105, 0x00, 0x21, ERRATA_X2_2371105}, + [8] = {2371105, 0x00, 0x20, ERRATA_X2_2371105}, [9] = {2701952, 0x00, 0x21, ERRATA_X2_2701952, \ ERRATA_NON_ARM_INTERCONNECT}, [10] = {2768515, 0x00, 0x21, ERRATA_X2_2768515}, |