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| author | Sandrine Bailleux <sandrine.bailleux@arm.com> | 2023-09-19 13:48:54 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-09-19 13:48:54 +0200 |
| commit | c228daf5f04001adc6686ec5bc5eed901a5c6788 (patch) | |
| tree | 4088122ae3d27f32962acf2ecfc9475e9209ca97 | |
| parent | 78b3792a48f2c33dbfda61f39f2d817c7e7209a9 (diff) | |
| parent | 408cde8a59080ac2caa11c4d99474b2ef09f90df (diff) | |
Merge "fix(qemu_sbsa): align FIP base to BL1 size" into integration
| -rw-r--r-- | plat/qemu/qemu_sbsa/include/platform_def.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/qemu/qemu_sbsa/include/platform_def.h b/plat/qemu/qemu_sbsa/include/platform_def.h index deaf16ea4..14030e35e 100644 --- a/plat/qemu/qemu_sbsa/include/platform_def.h +++ b/plat/qemu/qemu_sbsa/include/platform_def.h @@ -199,7 +199,7 @@ #define QEMU_FLASH1_BASE 0x10000000 #define QEMU_FLASH1_SIZE 0x10000000 -#define PLAT_QEMU_FIP_BASE 0x00008000 +#define PLAT_QEMU_FIP_BASE BL1_SIZE #define PLAT_QEMU_FIP_MAX_SIZE 0x00400000 /* This is map from GIC_DIST up to last CPU (255) GIC_REDISTR */ |