diff options
| author | Olivier Deprez <olivier.deprez@arm.com> | 2023-09-14 18:10:29 +0200 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-09-14 18:10:29 +0200 |
| commit | 4bb6bd1e5b550ee4329716954f8b83327321eeca (patch) | |
| tree | 13657b91c150d534aec355ee810d1d4dd925ca73 | |
| parent | 75bfc18d6c00da007b9d8230ca277fa80c0515b3 (diff) | |
| parent | 3209b35d2a372e71b96f3efbd7631d32518dc9b7 (diff) | |
Merge "fix(plat/arm): do not program DSU CLUSTERPWRDN register" into integration
| -rw-r--r-- | plat/arm/board/fvp/fvp_pm.c | 19 | ||||
| -rw-r--r-- | plat/arm/css/common/css_pm.c | 22 |
2 files changed, 1 insertions, 40 deletions
diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c index 534a175fc..51dda9ec0 100644 --- a/plat/arm/board/fvp/fvp_pm.c +++ b/plat/arm/board/fvp/fvp_pm.c @@ -65,25 +65,6 @@ static void fvp_cluster_pwrdwn_common(void) /* Disable coherency if this cluster is to be turned off */ fvp_interconnect_disable(); -#if HW_ASSISTED_COHERENCY - uint32_t reg; - - /* - * If we have determined this core to be the last man standing and we - * intend to power down the cluster proactively, we provide a hint to - * the power controller that cluster power is not required when all - * cores are powered down. - * Note that this is only an advisory to power controller and is supported - * by SoCs with DynamIQ Shared Units only. - */ - reg = read_clusterpwrdn(); - - /* Clear and set bit 0 : Cluster power not required */ - reg &= ~DSU_CLUSTER_PWR_MASK; - reg |= DSU_CLUSTER_PWR_OFF; - write_clusterpwrdn(reg); -#endif - /* Program the power controller to turn the cluster off */ fvp_pwrc_write_pcoffr(mpidr); } diff --git a/plat/arm/css/common/css_pm.c b/plat/arm/css/common/css_pm.c index 3222226f7..bb64e734c 100644 --- a/plat/arm/css/common/css_pm.c +++ b/plat/arm/css/common/css_pm.c @@ -131,28 +131,8 @@ static void css_power_down_common(const psci_power_state_t *target_state) plat_arm_gic_cpuif_disable(); /* Cluster is to be turned off, so disable coherency */ - if (CSS_CLUSTER_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF) { + if (CSS_CLUSTER_PWR_STATE(target_state) == ARM_LOCAL_STATE_OFF) plat_arm_interconnect_exit_coherency(); - -#if HW_ASSISTED_COHERENCY - uint32_t reg; - - /* - * If we have determined this core to be the last man standing and we - * intend to power down the cluster proactively, we provide a hint to - * the power controller that cluster power is not required when all - * cores are powered down. - * Note that this is only an advisory to power controller and is supported - * by SoCs with DynamIQ Shared Units only. - */ - reg = read_clusterpwrdn(); - - /* Clear and set bit 0 : Cluster power not required */ - reg &= ~DSU_CLUSTER_PWR_MASK; - reg |= DSU_CLUSTER_PWR_OFF; - write_clusterpwrdn(reg); -#endif - } } /******************************************************************************* |