diff options
author | Olivier Deprez <olivier.deprez@arm.com> | 2023-09-28 15:19:40 +0200 |
---|---|---|
committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2023-09-28 15:19:40 +0200 |
commit | 494babe05d0826efb2835b3fc5217068f4585c5e (patch) | |
tree | 62f9430631b469699b68f623c7b8a842a4ad6089 | |
parent | ee7d7f66a7184bfdc0dda273eb66867d4cf21acd (diff) | |
parent | 1f6bb41dd951714b47bf07bb9a332346ca261033 (diff) |
Merge changes from topic "mp/fix_interrupt_type" into integration
* changes:
refactor(el3-runtime): plat_ic_has_interrupt_type returns bool
fix(el3-runtime): leverage generic interrupt controller helpers
fix(gicv3): map generic interrupt type to GICv3 group
chore(gicv2): use interrupt group instead of type
-rw-r--r-- | bl31/ehf.c | 4 | ||||
-rw-r--r-- | bl31/interrupt_mgmt.c | 6 | ||||
-rw-r--r-- | changelog.yaml | 3 | ||||
-rw-r--r-- | docs/components/platform-interrupt-controller-API.rst | 20 | ||||
-rw-r--r-- | drivers/arm/gic/v2/gicv2_main.c | 6 | ||||
-rw-r--r-- | drivers/arm/gic/v3/gicv3_main.c | 17 | ||||
-rw-r--r-- | include/drivers/arm/gicv2.h | 4 | ||||
-rw-r--r-- | include/drivers/arm/gicv3.h | 8 | ||||
-rw-r--r-- | include/plat/common/platform.h | 2 | ||||
-rw-r--r-- | plat/common/plat_gicv2.c | 18 | ||||
-rw-r--r-- | plat/common/plat_gicv3.c | 55 | ||||
-rw-r--r-- | plat/rpi/rpi3/platform.mk | 3 |
12 files changed, 90 insertions, 56 deletions
diff --git a/bl31/ehf.c b/bl31/ehf.c index b328380d1..6f3d9412e 100644 --- a/bl31/ehf.c +++ b/bl31/ehf.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -458,7 +458,7 @@ void __init ehf_init(void) int ret __unused; /* Ensure EL3 interrupts are supported */ - assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3) != 0); + assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3)); /* * Make sure that priority water mark has enough bits to represent the diff --git a/bl31/interrupt_mgmt.c b/bl31/interrupt_mgmt.c index b8cc3de08..68c7f10ad 100644 --- a/bl31/interrupt_mgmt.c +++ b/bl31/interrupt_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -47,9 +47,9 @@ static intr_type_desc_t intr_type_descs[MAX_INTR_TYPES]; ******************************************************************************/ static int32_t validate_interrupt_type(uint32_t type) { - if ((type == INTR_TYPE_S_EL1) || (type == INTR_TYPE_NS) || - (type == INTR_TYPE_EL3)) + if (plat_ic_has_interrupt_type(type)) { return 0; + } return -EINVAL; } diff --git a/changelog.yaml b/changelog.yaml index 7e7583293..cd514f7aa 100644 --- a/changelog.yaml +++ b/changelog.yaml @@ -902,6 +902,9 @@ subsections: - title: GIC-600AE scope: gic600ae + - title: GICv2 + scope: gicv2 + - title: SMMU scope: smmu diff --git a/docs/components/platform-interrupt-controller-API.rst b/docs/components/platform-interrupt-controller-API.rst index 069c87b84..4de39d1e5 100644 --- a/docs/components/platform-interrupt-controller-API.rst +++ b/docs/components/platform-interrupt-controller-API.rst @@ -120,39 +120,39 @@ This API should set the priority of the interrupt specified by first parameter In case of Arm standard platforms using GIC, the implementation of the API writes to GIC *Priority Register* set interrupt priority. -Function: int plat_ic_has_interrupt_type(unsigned int type); [optional] -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Function: bool plat_ic_has_interrupt_type(unsigned int type); [optional] +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ :: Argument : unsigned int - Return : int + Return : bool This API should return whether the platform supports a given interrupt type. The parameter ``type`` shall be one of ``INTR_TYPE_EL3``, ``INTR_TYPE_S_EL1``, or ``INTR_TYPE_NS``. In case of Arm standard platforms using GICv3, the implementation of the API -returns ``1`` for all interrupt types. +returns *true* for all interrupt types. -In case of Arm standard platforms using GICv2, the API always return ``1`` for +In case of Arm standard platforms using GICv2, the API always return *true* for ``INTR_TYPE_NS``. Return value for other types depends on the value of build option ``GICV2_G0_FOR_EL3``: - For interrupt type ``INTR_TYPE_EL3``: - - When ``GICV2_G0_FOR_EL3`` is ``0``, it returns ``0``, indicating no support + - When ``GICV2_G0_FOR_EL3`` is ``0``, it returns *false*, indicating no support for EL3 interrupts. - - When ``GICV2_G0_FOR_EL3`` is ``1``, it returns ``1``, indicating support for + - When ``GICV2_G0_FOR_EL3`` is ``1``, it returns *true*, indicating support for EL3 interrupts. - For interrupt type ``INTR_TYPE_S_EL1``: - - When ``GICV2_G0_FOR_EL3`` is ``0``, it returns ``1``, indicating support for + - When ``GICV2_G0_FOR_EL3`` is ``0``, it returns *true*, indicating support for Secure EL1 interrupts. - - When ``GICV2_G0_FOR_EL3`` is ``1``, it returns ``0``, indicating no support + - When ``GICV2_G0_FOR_EL3`` is ``1``, it returns *false*, indicating no support for Secure EL1 interrupts. Function: void plat_ic_set_interrupt_type(unsigned int id, unsigned int type); [optional] @@ -306,4 +306,4 @@ masks out the interrupt ID field from the acknowledged value from GIC. -------------- -*Copyright (c) 2017-2019, Arm Limited and Contributors. All rights reserved.* +*Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.* diff --git a/drivers/arm/gic/v2/gicv2_main.c b/drivers/arm/gic/v2/gicv2_main.c index ca2a0389a..696bede3c 100644 --- a/drivers/arm/gic/v2/gicv2_main.c +++ b/drivers/arm/gic/v2/gicv2_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -390,7 +390,7 @@ void gicv2_set_interrupt_priority(unsigned int id, unsigned int priority) * This function assigns group for the interrupt identified by id. The group can * be any of GICV2_INTR_GROUP* ******************************************************************************/ -void gicv2_set_interrupt_type(unsigned int id, unsigned int type) +void gicv2_set_interrupt_group(unsigned int id, unsigned int group) { assert(driver_data != NULL); assert(driver_data->gicd_base != 0U); @@ -398,7 +398,7 @@ void gicv2_set_interrupt_type(unsigned int id, unsigned int type) /* Serialize read-modify-write to Distributor registers */ spin_lock(&gic_lock); - switch (type) { + switch (group) { case GICV2_INTR_GROUP1: gicd_set_igroupr(driver_data->gicd_base, id); break; diff --git a/drivers/arm/gic/v3/gicv3_main.c b/drivers/arm/gic/v3/gicv3_main.c index 2c7480001..3c995171f 100644 --- a/drivers/arm/gic/v3/gicv3_main.c +++ b/drivers/arm/gic/v3/gicv3_main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * Copyright (c) 2023, NVIDIA Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -421,16 +421,15 @@ unsigned int gicv3_get_pending_interrupt_type(void) } /******************************************************************************* - * This function returns the type of the interrupt id depending upon the group - * this interrupt has been configured under by the interrupt controller i.e. - * group0 or group1 Secure / Non Secure. The return value can be one of the - * following : + * This function returns the group that has been configured under by the + * interrupt controller for the given interrupt id i.e. either group0 or group1 + * Secure / Non Secure. The return value can be one of the following : * INTR_GROUP0 : The interrupt type is a Secure Group 0 interrupt * INTR_GROUP1S : The interrupt type is a Secure Group 1 secure interrupt * INTR_GROUP1NS: The interrupt type is a Secure Group 1 non secure * interrupt. ******************************************************************************/ -unsigned int gicv3_get_interrupt_type(unsigned int id, unsigned int proc_num) +unsigned int gicv3_get_interrupt_group(unsigned int id, unsigned int proc_num) { unsigned int igroup, grpmodr; uintptr_t gicr_base; @@ -1059,8 +1058,8 @@ void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num, * is used if the interrupt is SGI or (E)PPI, and programs the corresponding * Redistributor interface. The group can be any of GICV3_INTR_GROUP* ******************************************************************************/ -void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num, - unsigned int type) +void gicv3_set_interrupt_group(unsigned int id, unsigned int proc_num, + unsigned int group) { bool igroup = false, grpmod = false; uintptr_t gicr_base; @@ -1071,7 +1070,7 @@ void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num, assert(proc_num < gicv3_driver_data->rdistif_num); assert(gicv3_driver_data->rdistif_base_addrs != NULL); - switch (type) { + switch (group) { case INTR_GROUP1S: igroup = false; grpmod = true; diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h index cfc168d5b..bebd9ceff 100644 --- a/include/drivers/arm/gicv2.h +++ b/include/drivers/arm/gicv2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -188,7 +188,7 @@ unsigned int gicv2_get_interrupt_active(unsigned int id); void gicv2_enable_interrupt(unsigned int id); void gicv2_disable_interrupt(unsigned int id); void gicv2_set_interrupt_priority(unsigned int id, unsigned int priority); -void gicv2_set_interrupt_type(unsigned int id, unsigned int type); +void gicv2_set_interrupt_group(unsigned int id, unsigned int group); void gicv2_raise_sgi(int sgi_num, bool ns, int proc_num); void gicv2_set_spi_routing(unsigned int id, int proc_num); void gicv2_set_interrupt_pending(unsigned int id); diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h index 5bb22fdf1..cf6a7465a 100644 --- a/include/drivers/arm/gicv3.h +++ b/include/drivers/arm/gicv3.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2022, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -556,7 +556,7 @@ void gicv3_cpuif_enable(unsigned int proc_num); void gicv3_cpuif_disable(unsigned int proc_num); unsigned int gicv3_get_pending_interrupt_type(void); unsigned int gicv3_get_pending_interrupt_id(void); -unsigned int gicv3_get_interrupt_type(unsigned int id, +unsigned int gicv3_get_interrupt_group(unsigned int id, unsigned int proc_num); void gicv3_distif_init_restore(const gicv3_dist_ctx_t * const dist_ctx); void gicv3_distif_save(gicv3_dist_ctx_t * const dist_ctx); @@ -579,8 +579,8 @@ void gicv3_enable_interrupt(unsigned int id, unsigned int proc_num); void gicv3_disable_interrupt(unsigned int id, unsigned int proc_num); void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num, unsigned int priority); -void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num, - unsigned int type); +void gicv3_set_interrupt_group(unsigned int id, unsigned int proc_num, + unsigned int group); void gicv3_raise_sgi(unsigned int sgi_num, gicv3_irq_group_t group, u_register_t target); void gicv3_set_spi_routing(unsigned int id, unsigned int irm, diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index e024d916d..c92121f60 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -111,7 +111,7 @@ int plat_ic_is_sgi(unsigned int id); unsigned int plat_ic_get_interrupt_active(unsigned int id); void plat_ic_disable_interrupt(unsigned int id); void plat_ic_enable_interrupt(unsigned int id); -int plat_ic_has_interrupt_type(unsigned int type); +bool plat_ic_has_interrupt_type(unsigned int type); void plat_ic_set_interrupt_type(unsigned int id, unsigned int type); void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority); void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target); diff --git a/plat/common/plat_gicv2.c b/plat/common/plat_gicv2.c index 0f988dc74..f78d2dfc6 100644 --- a/plat/common/plat_gicv2.c +++ b/plat/common/plat_gicv2.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -193,9 +193,9 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority) gicv2_set_interrupt_priority(id, priority); } -int plat_ic_has_interrupt_type(unsigned int type) +bool plat_ic_has_interrupt_type(unsigned int type) { - int has_interrupt_type = 0; + bool has_interrupt_type = false; switch (type) { #if GICV2_G0_FOR_EL3 @@ -204,7 +204,7 @@ int plat_ic_has_interrupt_type(unsigned int type) case INTR_TYPE_S_EL1: #endif case INTR_TYPE_NS: - has_interrupt_type = 1; + has_interrupt_type = true; break; default: /* Do nothing in default case */ @@ -216,7 +216,7 @@ int plat_ic_has_interrupt_type(unsigned int type) void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) { - unsigned int gicv2_type = 0U; + unsigned int gicv2_group = 0U; /* Map canonical interrupt type to GICv2 type */ switch (type) { @@ -225,17 +225,17 @@ void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) #else case INTR_TYPE_S_EL1: #endif - gicv2_type = GICV2_INTR_GROUP0; + gicv2_group = GICV2_INTR_GROUP0; break; case INTR_TYPE_NS: - gicv2_type = GICV2_INTR_GROUP1; + gicv2_group = GICV2_INTR_GROUP1; break; default: - assert(0); /* Unreachable */ + assert(false); /* Unreachable */ break; } - gicv2_set_interrupt_type(id, gicv2_type); + gicv2_set_interrupt_group(id, gicv2_group); } void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) diff --git a/plat/common/plat_gicv3.c b/plat/common/plat_gicv3.c index e1420bb90..baa70e0ba 100644 --- a/plat/common/plat_gicv3.c +++ b/plat/common/plat_gicv3.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause @@ -47,10 +47,6 @@ #pragma weak plat_ic_set_interrupt_pending #pragma weak plat_ic_clear_interrupt_pending -CASSERT((INTR_TYPE_S_EL1 == INTR_GROUP1S) && - (INTR_TYPE_NS == INTR_GROUP1NS) && - (INTR_TYPE_EL3 == INTR_GROUP0), assert_interrupt_type_mismatch); - /* * This function returns the highest priority pending interrupt at * the Interrupt controller @@ -116,12 +112,26 @@ uint32_t plat_ic_acknowledge_interrupt(void) /* * This function returns the type of the interrupt `id`, depending on how - * the interrupt has been configured in the interrupt controller + * the interrupt has been configured in the interrupt controller. */ uint32_t plat_ic_get_interrupt_type(uint32_t id) { + unsigned int group; + assert(IS_IN_EL3()); - return gicv3_get_interrupt_type(id, plat_my_core_pos()); + group = gicv3_get_interrupt_group(id, plat_my_core_pos()); + + switch (group) { + case INTR_GROUP0: + return INTR_TYPE_EL3; + case INTR_GROUP1S: + return INTR_TYPE_S_EL1; + case INTR_GROUP1NS: + return INTR_TYPE_NS; + default: + assert(false); /* Unreachable */ + return INTR_TYPE_EL3; + } } /* @@ -225,16 +235,37 @@ void plat_ic_set_interrupt_priority(unsigned int id, unsigned int priority) gicv3_set_interrupt_priority(id, plat_my_core_pos(), priority); } -int plat_ic_has_interrupt_type(unsigned int type) +bool plat_ic_has_interrupt_type(unsigned int type) { - assert((type == INTR_TYPE_EL3) || (type == INTR_TYPE_S_EL1) || - (type == INTR_TYPE_NS)); - return 1; + if ((type == INTR_TYPE_EL3) || (type == INTR_TYPE_S_EL1) || + (type == INTR_TYPE_NS)) { + return true; + } + + return false; } void plat_ic_set_interrupt_type(unsigned int id, unsigned int type) { - gicv3_set_interrupt_type(id, plat_my_core_pos(), type); + unsigned int group; + + switch (type) { + case INTR_TYPE_EL3: + group = INTR_GROUP0; + break; + case INTR_TYPE_S_EL1: + group = INTR_GROUP1S; + break; + case INTR_TYPE_NS: + group = INTR_GROUP1NS; + break; + default: + assert(false); /* Unreachable */ + group = INTR_GROUP0; + break; + } + + gicv3_set_interrupt_group(id, plat_my_core_pos(), group); } void plat_ic_raise_el3_sgi(int sgi_num, u_register_t target) diff --git a/plat/rpi/rpi3/platform.mk b/plat/rpi/rpi3/platform.mk index 53c97e225..06393e40b 100644 --- a/plat/rpi/rpi3/platform.mk +++ b/plat/rpi/rpi3/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -44,6 +44,7 @@ BL2_SOURCES += common/desc_image_load.c \ plat/rpi/common/rpi3_io_storage.c BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ + plat/common/plat_gicv2.c \ plat/common/plat_psci_common.c \ plat/rpi/rpi3/rpi3_bl31_setup.c \ plat/rpi/common/rpi3_pm.c \ |