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2019-03-19Reintroduce Cactus-MM and SPM-MM testsAntonio Nino Diaz
The code has been taken from commit 99f4fd283b6f ("cactus: Use UART2 instead of UART0") and modified slightly to be integrated in the current master. There are three tests that are failing in the CI. They have been disabled for the time being: - mem_attr_changes_tests() in cactus_main() in the file spm/cactus_mm/cactus_mm_main.c. - Two tests in the file tftf/tests/tests-spm-mm.xml. Change-Id: I6332cbff1cefeb82b9447fae1b613879e65186a1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-03-13Add ARMv8.3 pointer authentication supportAntonio Nino Diaz
ARMv8.3-PAuth adds functionality that supports address authentication of the contents of a register before that register is used as the target of an indirect branch, or as a load. This feature is supported only in AArch64 state. This feature is mandatory in ARMv8.3 implementations. This patch adds the functionality needed for platforms to provide authentication keys for the TF-A Test Framework, and a new option (ENABLE_PAUTH) to enable pointer authentication in the framework itself. This option is disabled by default. Pointer authentication support has been added to FVP. Change-Id: Id2d5c978deb68ae60107879f1c3d0b231cba9f42 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-03-04libc: Update includesAmbroise Vincent
Reflect the changes in the structure of libc. NB: the include of stdarg.h in nvm_results_helpers.c is not in alphabetical order because it needs to be included before stdio.h. Fixing this would require further changes. Change-Id: I07f62a3450802833408ff3e1f950fd3b643e5e33 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-04libc: Adapt to TFTFAmbroise Vincent
Add support for functions used in TFTF but not in TF-A. Replaced calls to plat_panic_handler with calls to panic, since there is no implementation of the former in TFTF. Change-Id: Ic10de2c6e749db97b932cd7ffbb6067b5befe914 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-04libc: Delete stdlib filesAmbroise Vincent
Keep uuid, rand and strncpy for compatibility reasons Change-Id: Iefd82a5c9df48f6159732027e40a58f7d6afc09f Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-04libc: Import from TF-AAmbroise Vincent
Based on arm-trusted-firware commit 873e394b3bf93214a441f9f98237b58fbbea55aa Change-Id: I510e092f2b9ff333e9461bdde8d80ed1fab1460c Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-02-11Synchronize files with TF-A repositoryAntonio Nino Diaz
Change-Id: Ieb56d0639efd29c2695751b2b36cc98ce2c90dab Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-30Remove SMCCC 2.0 supportAntonio Nino Diaz
SMCCC v2.0 is no longer required for SPM, and won't be needed in the future. The SPM implementation based on SPCI and SPRT was using it, but it has been adapted to SMCCC v1.0. Change-Id: I624b32f9547274b50add4ea81b485cc9f5121e53 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-28Merge changes from topic "sb/exception-dump"Sandrine Bailleux
* changes: Dump some registers when hitting an unexpected exception Improve readability of TFTF exceptions code
2019-01-25Sanitise includes of include/drivers across codebaseAntonio Nino Diaz
Enforce full include path for includes. The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them with the same name). Change-Id: I45e912b16c9fff81f50840dad7e7f90ed6637b2a Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-24Dump some registers when hitting an unexpected exceptionSandrine Bailleux
At the moment, no information is printed on the UART whenever we hit an unexpected exception, not even an error message. This is not great from the user's perspective, who has got no idea of what is going on. Now we print an error message, as well as the state of some of the registers. This includes general-purpose registers, as well as some system registers. This is implemented for TFTF running: - in AArch64 state, at EL2; - in AArch64 state, at NS-EL1; - in AArch32 state. We might want to dump more registers in the future but this patch at least provides a basis we can build upon. Also, the SP_EL0 has been removed from the list of registers saved in the CPU context because TFTF always uses SP_ELx and does not touch SP_EL0 at all. Change-Id: I56e4afa917b53b5ccccff1d5d09ac8ccfaa6ae49 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-15Always print file and line number in panic/unreachable macrosSandrine Bailleux
Release builds used to have a special variant of these macros without the source code location information. This kind of mechanism is useful when writing software that needs both a development and production version so that the source code information is not leaked when the device is in the field. However, in the context of TF-A Tests, it makes little sense, as it's unlikely somebody would ever ship a device with TF-A Tests installed on it. Change-Id: Ic14ad87c2756762807ee71142f21d6973233144e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-14Add CFI debug info to vector entriesSandrine Bailleux
This is based on TF-A commit 31823b6961d35a5d53e81d3bf4977ad7b2be81dd. Add Call Frame Information assembler directives to vector entries so that debuggers display the backtrace of functions that triggered a synchronous exception. For example, a function triggering a data abort will be easier to debug if the backtrace can be displayed from a breakpoint at the beginning of the synchronous exception vector. DS-5 needs CFI otherwise it will not attempt to display the backtrace. Other debuggers might have other needs. These debug information are stored in the ELF file but not in the final binary. Change-Id: I1129419f318465049f53b5e41c304ea61fa44483 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-11Partial sync of architectural headers with TF repositoryAntonio Nino Diaz
Change-Id: Ia4850f58f4519a71a049290839027ea7a0521415 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-07Make UUID buffer optional for is_trusted_os_present()Sandrine Bailleux
The caller might simply want to know whether there is a Trusted OS, without the need to identify it. Change-Id: I97eef8b6e6c4cb948d48735cd7170fced98aee9a Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-01-03Rename SMC first argumentSandrine Bailleux
'fid' (short for 'function ID') makes for a more explicit name. Change-Id: I41d90c39979162142b0377a68f4be90dc31de253 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-12-21Merge changes from topic "sb/terse-output"Sandrine Bailleux
* changes: Remove redundant error message in tftf_initialise_timer() Remove prints from VExpress NOR flash driver Remove prints in get_overall_test_result() Remove SHELL_COLOR build flag Do not print CPU MPID in mp_printf() Use vprintf() inside mp_printf() Add vprintf() in standard C library
2018-12-20Introduce syscounter_read() helper functionSandrine Bailleux
syscounter_read() reads the system counter value. It encapsulates the instruction barrier required to get an accurate timestamp for any time-sensitive related operation. Change-Id: Ib2cfe7789ee1471e614140d425d29ab5c8d306ea Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-12-19Merge "Make tests output more concise and clearer"Sandrine Bailleux
2018-12-18SPM: Add more SPCI helpersAntonio Nino Diaz
Change-Id: I966b1a8742eba197db2e983c1f0dd3ae0efa2541 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-13Make tests output more concise and clearerSandrine Bailleux
Also refactor the code that generates this output. This is only a first step, subsequent patches will further improve the output. Here is a sample of the old output: [cpu 0x0000] NOTICE: Starting unittest 'Template - Single core test' [cpu 0x0000] NOTICE: Unittest 'Template - Single core test' complete. Result: Passed [cpu 0x0000] NOTICE: Starting unittest 'Template - Multi core test' [cpu 0x0000] NOTICE: Unittest 'Template - Multi core test' complete. Result: Passed ========== TEST REPORT ========== # Test suite 'Template': - Single core test: Passed - Multi core test: Passed ================================= Tests Skipped : 0 Tests Passed : 2 Tests Failed : 0 Tests Crashed : 0 Total tests : 2 ================================= [cpu 0x0000] NOTICE: Exiting tests. And now the new output: [cpu 0x0000] -- [cpu 0x0000] Running test suite 'Template' [cpu 0x0000] Description: Template test code [cpu 0x0000] [cpu 0x0000] > Executing 'Single core test' [cpu 0x0000] TEST COMPLETE Passed [cpu 0x0000] [cpu 0x0000] > Executing 'Multi core test' [cpu 0x0000] TEST COMPLETE Passed [cpu 0x0000] [cpu 0x0000] ******************************* Summary ******************************* [cpu 0x0000] > Test suite 'Template' [cpu 0x0000] Passed [cpu 0x0000] ================================= [cpu 0x0000] Tests Skipped : 0 [cpu 0x0000] Tests Passed : 2 [cpu 0x0000] Tests Failed : 0 [cpu 0x0000] Tests Crashed : 0 [cpu 0x0000] Total tests : 2 [cpu 0x0000] ================================= [cpu 0x0000] NOTICE: Exiting tests. Change-Id: I9d52f2da8905962ab1df73d0691846d88622d3b5 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-12-13Do not print CPU MPID in mp_printf()Sandrine Bailleux
mp_printf() should just be an MP-safe version of printf(), i.e. one that takes the console lock before printing. It should not be responsible for printing the CPU MPID as well, this decision should be left to the caller. Also make Cactus and Ivy use mp_printf(). Before that, they could not call this function because they couldn't access the MPIDR_EL1 as S-EL0 images. Change-Id: I4eafee01ffc279296395b94dd4a07cfbb8e858e2 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-12-13Add vprintf() in standard C librarySandrine Bailleux
This is a trivial, unoptimised implementation. Change-Id: Ia05a3fbbc7582583f7e8ae06e464c96a6b4e766d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-12-11Remove MPIDR_{CLUSTER,CPU}_ID macros from arch.hAntonio Nino Diaz
Hardcoding CPU to affinity level 0 and cluster to level 1 isn't correct. This patch removes the definitions from arch.h to prevent more tests from making this assumption. It doesn't fix the tests that are already using them as it may be needed to do more changes to make the tests truly generic. Change-Id: I3e5362ef7db7769f7db98ba68ad3842f5baa3e60 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-11ivy: Introduce new test Secure PartitionAntonio Nino Diaz
In order to test multiple partitions it is needed to have at least two different partitions with different services. This way it isn't possible to accidentally call partition A with a service of partition B and have it work correctly. Cactus is meant to be the main test Secure Partition. It is the one meant to have most of the tests that a Secure Partition has to do. Ivy is meant to be more minimalistic. In the future, Cactus may be modified to be a S-EL1 partition while Ivy will remain as a S-EL0 partition. Change-Id: I29d09b9f9400b58568f9b90344a4034332a6e6e1 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-11SPM: Introduce SPRT C client libraryAntonio Nino Diaz
Change-Id: I2f110b4d06d2821d8bdf818ab7523a5c0a6b9ab9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10SPM: Test open and close handleAntonio Nino Diaz
The tests request valid and invalid handles and close them. Change-Id: Ie421507d8dd4793e635e82f74c206529d9ba59d0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10SPM: Import SPCI and SPRT headersAntonio Nino Diaz
Change-Id: I0abd16e486aa500aed0108786dbae6eb90a49c1f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10SPM: Remove old interfaces and testsAntonio Nino Diaz
Remove code based on MM_COMMUNICATE. Remove tests based on it. Also, remove the now empty arm_def.h. Change-Id: I08a2680b10df3a24c67abb10e5dc07fda99f6fb9 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-29Make topology.h macros more readableJohn Tsichritzis
The three parts of the "for" loops are more readable than before. The way they are written now, it is clear which are the initial and final values of the loop controlling variables. Also, parentheses were added only to those macro parameters that can receive expressions as arguments. E.g. in for_each_cpu(cpu), "cpu" must receive a variable name, it cannot receive an expression. So there was no reason to clutter the macro body with unnecessary parentheses wherever "cpu" parameter appears. Parentheses were added only around those parameters that might receive expressions. The parameters in for_each_cpu_in_power_domain were swapped. This was done for consistency with the other two macros. Thus, the first parameter is always the iterating variable, in all macros. Change-Id: I18831237840e9cfa738a48dbe7f1ec449c89f7af Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2018-11-27Move BL1 SMC FIDs macros out of platform layerSandrine Bailleux
BL1 SMC function IDs are not platform-specific so move them to a new generic header file, called bl1.h. Change-Id: I621483f7737f8101e9f370343e1a45a731c31c3b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-11-27Fix type of SMC function IDSandrine Bailleux
The SMC function identifier is always a 32-bit integer, regardless of the caller's execution state and of the SMC calling convention in use. Change-Id: I8d4f7b9efcea3f00ac2ff0a397ca0d8ab824eecb Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-11-26Move timer register helpers from arch.h to arch_helpers.hAntonio Nino Diaz
Some of the affected macros can only be used from C code. In general, we use arch_helpers.h for any C helpers to access registers. For consistency, the other macros have been moved as well. Change-Id: If27ee82b067d920d7b338c0a1b6e61a6ec078f4f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-26Expand MPID_MASK define to affinity level 3Antonio Nino Diaz
Change-Id: If643498433dfa2007703227226064b9d12f4c242 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-26Remove unused AArch64 assembly helpersAntonio Nino Diaz
Change-Id: I55a567014023d593ec96dd9eff71bfca01db9c61 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-26Remove some unused header inclusions in pmf.hSandrine Bailleux
Change-Id: I16127da5f14b53e06201be8c03d70afde8f7ad8e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-11-26Synchronise arch.h and arch_helpers.h with TF-AAntonio Nino Diaz
The headers forked at some point in the past and have diverged a lot. In order to make it easier to share code between TF-A-Tests and TF-A, this patch synchronises most of the definitions in the mentioned headers. This is not a complete sync, it has to be followed by more cleanup. Change-Id: I35c1b928cb4c06ae52483406c933e5f11cb47bf8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-20xlat v2: Synchronise code with TFAntonio Nino Diaz
Change-Id: Ibf4fffbfc025b205223d17a579f8cde386252199 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-20stdlib: Increase compatibility with TF-AAntonio Nino Diaz
Code that originates from the Trusted Firmware-A project expects the stdlib headers to work in a specific way and to have some specific defines. Specifically, TF-A doesn't have the non-standard types.h header, and it has all the definitions in stdint.h. Also, the __init define is missing. No component of this repository needs this option, but having the define in cdefs.h allows code sharing between both projects. Change-Id: Ic298fd87a6c2cf8a9e5b8a18fc274d4150ed0a13 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-16Remove SMCCC_MINOR/MAJOR_VERSION macrosSandrine Bailleux
The purpose of these macros is unclear - is it tracking the exact SMCCC version expected by the TF-A Tests, or the maximum version, or something else? Besides, they are not used in the source tree so better to remove them as to avoid any confusion. Change-Id: Ieb426dc9c54f19b0907d3221bb5606e03c9e360f Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-11-07Drop support for semihostingSandrine Bailleux
We don't use semihosting in any of our test configs at the moment so there's a risk this code might get broken without us notifying it. It seems better to reintroduce it if and when we actually need it. Change-Id: Iae84e3be034cc3da0248954aa5a1029ddd50aabb Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-10-31Introduce test to access pointer authentication registerJeenu Viswambharan
EL3 runtime firmware currently enables unconditional access to pointer authentication registers from lower EL [1]. The test performs a read access on a pointer authentication system register to ensure that the access is permitted from a lower EL, and doesn't result in a trap to EL3. [1] https://github.com/ARM-software/arm-trusted-firmware/commit/3ff4aaaca44b75504aec5ab5b72cd587a6fcd432 Change-Id: I893604ebcd9e5df830d97cce405c2a7518c0b23c Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-10-15Move platform_helpers.S to each platform's folderAntonio Nino Diaz
In practice, all the functions in this file are platform-specific. It is better to force all platforms to implement than having some sort of weak function placeholder. Porting guide updated. Change-Id: I5beeeb10bec6fe5178b24503d6da8ca66074a8c6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-10Trusted Firmware-A Tests, version 2.0Sandrine Bailleux
This is the first public version of the tests for the Trusted Firmware-A project. Please see the documentation provided in the source tree for more details. Change-Id: I6f3452046a1351ac94a71b3525c30a4ca8db7867 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: amobal01 <amol.balasokamble@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Co-authored-by: Asha R <asha.r@arm.com> Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Co-authored-by: David Cunado <david.cunado@arm.com> Co-authored-by: Dimitris Papastamos <dimitris.papastamos@arm.com> Co-authored-by: Douglas Raillard <douglas.raillard@arm.com> Co-authored-by: dp-arm <dimitris.papastamos@arm.com> Co-authored-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com> Co-authored-by: Jonathan Wright <jonathan.wright@arm.com> Co-authored-by: Kévin Petit <kevin.petit@arm.com> Co-authored-by: Roberto Vargas <roberto.vargas@arm.com> Co-authored-by: Sathees Balya <sathees.balya@arm.com> Co-authored-by: Shawon Roy <Shawon.Roy@arm.com> Co-authored-by: Soby Mathew <soby.mathew@arm.com> Co-authored-by: Thomas Abraham <thomas.abraham@arm.com> Co-authored-by: Vikram Kanigiri <vikram.kanigiri@arm.com> Co-authored-by: Yatharth Kochar <yatharth.kochar@arm.com>
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