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2022-10-04fix(interrupts): dont enable virtual maintenance interruptsMadhukar Pappireddy
SPMC enables the following virtual maintenance interrupts by default for each Secure Partition: > MANAGED_EXIT_INTERRUPT_ID > NOTIFICATION_PENDING_INTERRUPT_INTID Hence, no need to send a request to SPs to enable them. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I7fc605b9b78ad759728909cd28ad2d2083c5de54
2022-09-30test(interrupts): exercise ns interrupt being signaled to SPMadhukar Pappireddy
This patch adds a tftf based test to exercise non-secure interrupt handling being signaled to the Cactus SP by the SPMC while processing a direct message. A detailed description is provided in the comment leading the test function. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I2f8511135470d2ca8f567532a1cb7c4ae374af3f
2022-09-27test(pauth): updated helpers to include QARMA3Juan Pablo Conde
QARMA3 is a pointer authentication algorithm introduced by v8.3 extensions. Previous tests did not consider the possible presence of QARMA3 algorithm, as it was released in v8.8. This algorithm can be detected through fields ID_AA64ISAR2_EL1.{GPA3, APA3} when they are not 0. This patch modifies the helper function that detects the presence of PAuth, considering the possibility of having QARMA3 available. In addition, is_armv8_3_pauth_gpa_gpi_present() and is_armv8_3_pauth_apa_api_present() were modified to take into account fields GPA3 and APA3 (from ID_AA64ISAR2_EL1) respectively. Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com> Change-Id: I486c6d3118a040b3352eff2b0d5709baf0518314
2022-08-25Merge "fix: mismatched sme header guard name"Sandrine Bailleux
2022-08-24fix: mismatched sme header guard nameOlivier Deprez
Fix SME extension header pre-processor macro name for the header inclusion guard. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I1ab95d67f77212342416c24f9fb97d42dd0e8c63
2022-08-24refactor: rename FFA_MSG_RUN to FFA_RUNOlivier Deprez
The correct ABI function name is FFA_RUN per FF-A v1.1 EAC0 specification. Update it in the relevant FF-A helpers. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I82858c6a6080b946f4882f8d85a30795d8e60e58
2022-08-18Merge "feat(rng_trap): add tests for FEAT_RNG_TRAP"Madhukar Pappireddy
2022-08-16feat(rng_trap): add tests for FEAT_RNG_TRAPJuan Pablo Conde
Added 2 tests that expect a trap to be triggered when a read is performed on: 1. RNDR register 2. RNDRRS register The result will be a panic signal and the whole system will halt, as there is no handler set for such trap. Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com> Change-Id: Ia979e60a106b394cc09dfdf94115354fb72142d1
2022-08-04fix(sve): discover the SVE vector lengthOlivier Deprez
Currently the (SPM) test that the SVE vectors are preserved assumes that the SVE vector length is whatever the hard coded maximum vector length we have at build time is, currently 512 bits. The tests fill a buffer that can hold the full set of maximally sized vectors, load it into the registers, do a call and then read the values back into a separate buffer and compare with the original buffer. If the VL is less than the maximum then this comparison will fail since only the subset of the read buffer used by the actual vector length will be filled. Fix this by reading the SVE vector length at runtime and using that when verifying the read data rather than the hard coded maximum value. Increase the SVE test buffers to the maximum permitted by the architecture. Configure ZCR_EL2.LEN to the maximum permitted value (to the limit of the implementation and EL3 constraint). Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I1d96327d3423f2f8a3d7289ae02ab06a4bf9fde3
2022-07-20feat(ff-a): add FFA_CONSOLE_LOG ABI test.Maksims Svecovs
Add Cactus FF-A test to exercise FFA_CONSOLE_LOG ABI. Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com> Change-Id: Icad3b546c8eddd80c7a9cc3843d39679e91c6c2a
2022-07-07feat(tftf): refactoring of some tftf function helpersnabkah01
This refactoring is introduced in order to reuse some useful function helpers which already exist in the code base, by moving one function to test_helpers.c Signed-off-by: Nabil Kahlouche <nabil.kahlouche@arm.com> Change-Id: If5c24da9062d100419220fe000409b73596e773c
2022-06-23test(ff-a): uuid field for ffa_partition_info_getDaniel Boulby
The EAC0 v1.1 FF-A spec now requires that the UUID field in the partition information descriptors is only populated when FFA_PARTITION_INFO_GET is supplied with a null uuid (Table 13.37). This patch updates the tests to check for this. Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: I241c6bed4fc5f63ec91a7b86725be5b2ee838601
2022-06-23test(ff-a): check w3 for ffa_partition_info_getDaniel Boulby
Check that the size of the partition info descriptor is correctly populated when calling ffa_partition_info_get. Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: I56fa0e82e52c1ed35fc2ea0208d69eabc5800935
2022-06-06fix(rme/fid): refactor RMI fid macrosSubhasish Ghosh
Refactored RMI FID macros to simplify usage. Signed-off-by: Subhasish Ghosh <subhasish.ghosh@arm.com> Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: I2a0e53035c86c4473eda8219c4860941a244ae3d
2022-05-19test(spm): use ffa_helpers for ivy partitionDaniel Boulby
Allow the ivy partition to use the ffa_helpers functions. To achieve this we create a common struct for ff-a calls that is used for both parameters and returns, this aligns with the Hafnium implementation. We can then use preprocessor macros to pick either SMC or SVC as the conduit depending on the exception level the SP is running at. Change-Id: Ic9525baabcf40d15545b6f6d504cf954373f08f9 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2022-05-18Merge "feat(WFxT): add a test for WFxT instructions"Bipin Ravi
2022-05-18test(tftf): prevent secure region access from Realm worldnabkah01
This change adds a TFTF test attempting an access to a memory region marked Secure in the GPT from a Realm world. RMM catches the GPF and return a proper code error which is used in TFTF to assert the test result accordingly. Signed-off-by: Nabil Kahlouche <nabil.kahlouche@arm.com> Change-Id: I1c259e0db0910b5e4b72856c07613a8989ba9187
2022-05-18feat(ff-a): create function helper to setup FF-A mailboxnabkah01
Fix test dependencies issue when SPM test is used individually. Provide an API function from SPM test suite to initialize the FF-A mailbox and enable FF-A based message with SP. Signed-off-by: Nabil Kahlouche <nabil.kahlouche@arm.com> Change-Id: I246491907f1641c47937a9a1c91cfd4a9b8bfe20
2022-05-18feat(WFxT): add a test for WFxT instructionsManish V Badarkhe
This patch adds the test to verify the WFET and WFIT instructions introduced by FEAT_WFxT. WFET and WFIT instructions assist in generating local-timeout event and thereby act as wakeup event for the PE, when the virtual count in CNTVCT_EL0 (counter-timer virtual count) register equals or exceed the timeout value passed with these instructions. Accordingly, this testcase verifies whether the time lapsed matches the value supplied with WFET and WFIT instructions. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: I9aea5da869db8520e305e49989cb71f166a582eb
2022-05-09feat(brbe): test that EL3 has properly enabled access to BRBEjohpow01
Access to FEAT_BRBE control registers must be explicitly enabled in EL3, this simple test just ensures that the registers are accessible or traps to EL3, similar to the TRBE test. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I0a25c5ce6beb6aa96b9428264b75cb3569ac535a
2022-05-06Merge changes from topic "ja/boot_protocol"Olivier Deprez
* changes: feat(ff-a): receive boot information feat(ff-a): boot information structures
2022-04-28feat(tftf): add common header for SIZE macro'sVishnu Banavath
This would be very handy to define macro's with size. This change is to add common header file with size defines. Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com> Change-Id: I7ddfb7d10a6a8d0a191c6d0019c4730b4b08930c
2022-04-22feat(ff-a): boot information structuresJ-Alves
Defining structures for the boot info header and boot info descriptors, in addition to helper field accessor functions, and helper macros, aligned with FF-A v1.1 EAC0 specification. Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I45f7d6aee794a37dd812224c2709f4b09a75a2b6
2022-04-04Merge changes from topic "mp/sec_intr_management"Olivier Deprez
* changes: test(interrupts): check if last service interrupt is Trusted Wdog timer feat(interrupts): query last serviced interrupt test(interrupts): use custom handler for interrupt feat(interrupts): support for registering custom handler refactor(interrupts): enhance secure interrupt handling test
2022-03-25test(cactus): add test for NS memory sharing between SPsFederico Recanati
Define a new shared memory region in 48-bit address range (configured as NS in the TZC) in cactus-tertiary's manifest. Since SPs can share either secure or non-secure memory, propagate the security information in the relevant cactus commands: CACTUS_REQ_MEM_SEND_CMD and CACTUS_MEM_SEND_CMD. Change-Id: I10af24c96ff8fc0d13c80a52b0264a1482a5cf56 Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-03-25fix(plat/arm/fvp): make address space configurableFederico Recanati
Make FVP physical/virtual address space sizes configurable, with default at 34-bit (previously hard-coded value). Maximum tested value is 48-bit, FVP interconnect doesn't yet support 52-bit PA. Increase MAX_XLAT_TABLE and consequently NS_BL1U_RW_SIZE and NS_BLU2_LIMIT to accommodate the increased translation tables (based on 48-bit max PA size). Custom PA size is passed to build system through the PA_SIZE define. FVP needs to be configured in a compatible way through the parameters: * cluster0.PA_SIZE, for each cluster; * bp.dram_size, setting a memory limit corresponding at least to PA_SIZE; * cci550.addr_width, interconnect address width should match PA_SIZE; * pci.pci_smmuv3.mmu.SMMU_IDR5, SMMU has to be configured as well if present. Change-Id: I57bc898fb2c9696c01fc8e20d00b4a3d09e22326 Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-03-22feat(interrupts): query last serviced interruptMadhukar Pappireddy
This patch introduces a helper API to request Cactus SP to return the ID of the last serviced secure virtual interrupt. It is built on cactus command framework by leveraging direct message request and response pair. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I316268f4d9b80f29c308d1a1488945a272ffbc93
2022-03-17refactor(interrupts): enhance secure interrupt handling testMadhukar Pappireddy
This test makes sure SPMC was able to handle back-to-back secure interrupts targetting Cactus SP while the SP was in RUNNING state. Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: If2e93017e2c21ad91fe527fb140f0fd5e0252370
2022-03-08fix(tftf): remove invalid_access test from standard testsManish Pandey
Invalid_access test suite performs negative tests by accessing invalid memory and catching it in custom exception handler. This test suite was made part of standard tests which is called for all platforms and each EL3 configuration. This test was failing for the case when EL3 was build with "HANDLE_EA_EL3_FIRST = 1" causing exceptions to be trapped in EL3 and not forwarded to EL2 to be handled by custom exception handler. To avoid this problem, remove this suite from standard test and introduce a new test configuration. This patch also fixes a minor compilation error in file cactus_test_memory_sharing.c Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I8a13617a01411be45c623dde2ccfc7d950f05f9a
2022-03-04Merge "test(ff-a): versioned partition info descriptors"Olivier Deprez
2022-03-02Merge changes from topic "od/invalid-access-tests"Manish Pandey
* changes: test(tftf): prevent realm region access from nwd test(cactus): prevent realm region access from swd feat(fvp): enable test to access el3 memory feat(tftf): add tests to access invalid memory
2022-03-01test(cactus): prevent realm region access from swdOlivier Deprez
This change adds TFTF and cactus tests to check a realm region cannot be accessed from secure world. A non-secure buffer is delegated to realm PAS and shared to a secure partition through FF-A memory sharing operations. The SP retrieves the region from the SPM, maps it and attempts a write access. The PE is expected to trigger a GPF data abort caught by a custom exception handler. Exception is trapped at S-EL1 within the secure partition because Hafnium configures HCR_EL2.GPF=0 (and SCR_EL3.GPF=0). Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I8f855f394d0490b3584e60ceba4f3d2a20197495
2022-03-01Merge "test(el3-runtime): check DIT is retained on exception"Joanna Farley
2022-03-01feat(tftf): add tests to access invalid memoryManish Pandey
Add test framework to access memory addresses which are not accessible to tftf. The test only introduced for "aarch64" as there is no sync exception handler for "aarch32". The test framework will catch the error and do graceful exit. For now only test introduced is to access memory owned by EL3, which can be easily extended to add more tests to access realm/secure(in RME enabled systems). Platform needs to provide test address, if not then test will be skipped. Test steps: 1. Register a custom sync exception handler(try & catch) 2. Access a protected memory, should give data abort. 3. Exception handler should check if data abort then continue. 4. Unregister custom exception handler. Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib8b199acb9b96548c889539610ff1b58777d3d1d
2022-02-10Merge changes from topics "mp/invalid_access", "od/invalid-access-tests"Manish Pandey
* changes: tftf(arch): exception syndrome iss macro feat(tftf): introduce handler for synchronous exceptions
2022-02-10Merge changes from topic "v8.7-ext-work"Madhukar Pappireddy
* changes: feat(afp): add a test for Advanced floating-point feat(spe): add simple SPE test
2022-02-09tftf(arch): exception syndrome iss macroOlivier Deprez
Add macros to extract the ISS portion of an ELx ESR exception syndrome register. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I2bc94f05858f2dcbbe8ba81362bf660324fd388d
2022-02-09feat(tftf): introduce handler for synchronous exceptionsOlivier Deprez
Introduce a handler for synchronous exceptions (for aarch64) which currently is treated as unhandled exception. Also, added the capability to allow registering a custom handler by tftf framework to allow graceful exit while doing negative tests. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I4d8d1f5af9951edfe8f068ce85f7d434b2ec070f
2022-02-09feat(cactus): memory sharing flags in test commandsJ-Alves
Extend the test command CACTUS_MEM_SEND_CMD: - To include the flags for the retriever to use in transaction descriptor to the FFA_MEM_RETRIEVE_REQ. - Number of words cactus should write to the shared page after retrieving it. - Check if memory has been cleared after mapping to cactus address space if clear memory flag was propagated in the command arguments. Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: I825b0f766bd7132a3488cdd17d83fce85adf4a5a
2022-02-04test(ff-a): versioned partition info descriptorsDaniel Boulby
Add test to ensure an endpoint that sets it's version to v1.0 receives v1.0 partition info descriptors as defined in table 8.25 in the v1.0 FF-A specification when calling ffa_partition_info_get. Also introduce ffa_partition_info_count wrapper. Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: I9f42e1898230208d85153714592b1a4165c92ce1
2022-02-02test(el3-runtime): check DIT is retained on exceptionDaniel Boulby
Add a test to check that the PSTATE bits not set in the Aarch64.TakeException but set to a default when taking an exception to EL3 are maintained after an exception and that changes in TSP do not effect the PSTATE in TFTF and vice versa. Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: Id4d625c7e9cbb565ac236f844274319cc02c2335
2022-01-27feat(afp): add a test for Advanced floating-pointManish V Badarkhe
This test is to ensure that TFTF is allowed to write the FPCR register bits to control the floating-point operation when FEAT_AFP is implemented. Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I21ea288e698bbe706aac55740e28d5f6ccb700dc
2022-01-27feat(spe): add simple SPE testManish V Badarkhe
Added simple SPE test that reads static profiling system registers of available SPE version i.e. FEAT_SPE/FEAT_SPEv1p1/FEAT_SPEv1p2 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I6fe02914b0ad5e8b702654dab27aee449b3b7b9f
2022-01-14refactor(ff-a): mem share helper change to test error returnsMaksims Svecovs
In order to test FF-A memory sharing operations in faulty cases we need to be able to get the details of smc call failure in tftf and cactus. Passes smc_ret_value in the relevant memory management test helpers. Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com> Change-Id: I81059b77cbb01fe9427905adbe262ba8d0670cee
2022-01-06test(ff-a): update partition info to include uuidsDaniel Boulby
The ffa_partition_info_get interface has been updated in spm to return the uuid of the partition in the descriptor. Updates the tests to check this. Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Change-Id: I8f4cc4a26a781288896e56977c198c69fa09d974
2021-12-10Merge "fix(rme/fid): align RMI FIDs with SMCCC"Alexei Fedorov
2021-12-10feat(sme): add basic SME testsjohpow01
This test enters streaming mode and iterates through supported SME vector lengths to ensure that EL3 has properly enabled SME for use at lower non-secure ELs. If FA64 is present, it attempts to execute an illegal instruction. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Ic80a1e5652a88261524778329d3bc99901a799d8
2021-12-07fix(rme/fid): align RMI FIDs with SMCCCSubhasish Ghosh
This patch allocates the RMI FIDs from the Standard Secure Service call range of SMCCC. Signed-off-by: Subhasish Ghosh <subhasish.ghosh@arm.com> Change-Id: I9fafa971d5196835603deff3875ec47f51f8ee23
2021-11-15feat(hcx): test that HCRX_EL2 is accessiblejohpow01
On systems with FEAT_HCX support this CPU extension test attempts to access HCRX_EL2, if it can then the test passes, if not the system traps to EL3 and crashes. This tells us whether or not TF-A has properly enabled access to the register. To enable this test, compile TFTF with TESTS=hcx, this is done to prevent this test from running automatically on systems which may support FEAT_HCX but do not have it enabled in TFA. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: If5787c3e947872169af3c9c3e57587cbcd41fd9e
2021-11-10Merge changes from topic "ja/notifications"Olivier Deprez
* changes: test(notifications): signaling from MP SP to UP SP feat(cactus): enable notifications for cactus tertiary test(notification): support included in FFA_PARTITION_INFO_GET test(cactus): notifications support enabled in manifest test(notifications): retrieve interrupt IDs feat(notifications): update FFA_FEATURES test feat(spm): add VM_ID macro to spm tests test(notifications): NPI for per-vCPU notifications feat: spm helper functions for MP tests refactor(notifications): tidy global notifications to SP tests test(notifications): NPI handling feat(cactus): validate NPI injection test(notifications): validate SRI is delayed test(ff-a): notifications SRI is not delayed refactor(spm): managed exit tests refactor(cactus): notification set command for SRI test feat(cactus): count requests received test(notifications): test schedule receiver interrupt feat(tftf): improve notifications tests logging
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